EDA

November 7, 2019
Ron Press is the technology enablement director of the Tessent product family at Mentor, A Siemens Business. He is a member of the International Test Conference (ITC) Steering Committee, a Golden Core member of the IEEE Computer Society, and a Senior Member of the IEEE.

International Test Conference celebrates 50 years of advancing test technology

It's the fiftieth International Test Conference this year. How much has been achieved and how much more work is there to do to ensure that we can keep building chips that do what they are supposed to?
Expert Insight  |  Topics: EDA - DFT  |  Tags:   |  Organizations: , , ,
October 29, 2019
Sandra Kupperman is a technical marketing engineer with the Tanner EDA product division of Mentor, a Siemens Business.

Efficient IoT system design for AMS, MEMS and photonics designs

Why developing an IoT design environment demands an integrated, top-down design flow that combines AMS, digital, RF, photonics, and MEMS design and verification tools.
Expert Insight  |  Topics: EDA Topics  |  Tags: , , ,   |  Organizations:
October 16, 2019
Tom Anderson is a technical marketing consultant working with multiple EDA vendors, including AMIQ EDA. His previous roles have included vice president of marketing at Breker Verification Systems, vice president of applications engineering at 0-In Design Automation, vice president of engineering at IP pioneer Virtual Chips, group director of product management at Cadence, and director of technical marketing at Synopsys. He holds a Master of Science degree in Computer Science and Electrical Engineering from M.I.T. and a Bachelor of Science degree in Computer Systems Engineering from the University of Massachusetts at Amherst.

Achieving the interactive development of low-power designs

Power intent files have increased efficiency and the use of an IDE can prevent them becoming outdated as a design evolves.
Expert Insight  |  Topics: EDA - IC Implementation, Verification  |  Tags: , , , , , , , , , ,   |  Organizations:
October 9, 2019
Dina Medhat - Mentor

An easier way to make reliability rules and checks more consistent

Learn how XML-based constraints can standardize rule development and use with coding examples for the Calibre PERC reliability platform.
October 7, 2019
Richard Pugh featured image SSD expert insight

Emulation makes it possible to stay on the road to autonomous vehicles

Autonomous vehicle functional verification needs to prove the predictable behavior, safety and security of complex SoCs and their associated software, sensors and actuators, demanding greater use of hardware emulation.
Expert Insight  |  Topics: Digital Twin, EDA - Verification  |  Tags: ,   |  Organizations:
September 25, 2019
Tom Anderson is a technical marketing consultant working with multiple EDA vendors, including AMIQ EDA. His previous roles have included vice president of marketing at Breker Verification Systems, vice president of applications engineering at 0-In Design Automation, vice president of engineering at IP pioneer Virtual Chips, group director of product management at Cadence, and director of technical marketing at Synopsys. He holds a Master of Science degree in Computer Science and Electrical Engineering from M.I.T. and a Bachelor of Science degree in Computer Systems Engineering from the University of Massachusetts at Amherst.

Delivering on the advanced refactoring of design and verification code

An IDE is critical to top quality refactoring. Here are some tips and examples of how to achieve that.
Expert Insight  |  Topics: Uncategorized  |  Tags: , , , , , , , , ,   |  Organizations: ,
September 19, 2019
Hossam Sarhan, Mentor, a Siemens business

Today’s analog/RF designs need interconnect inductance extraction

Parasitic extraction has to take more account of inductive effects as operating frequencies rise and feature sizes shrink in complex SoCs.
Expert Insight  |  Topics: Electrical Design, EDA - IC Implementation  |  Tags: ,   |  Organizations: ,
September 18, 2019

Implementing high performance, low power Bluetooth Low Energy interfaces in SoCs

A look at the complexiites of implementing a Bluetooth Low Eenergy interface in an SoC.
Article  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: ,   |  Organizations: ,
September 13, 2019
John Blyler is a Consulting Editor of Tech Design Forum and the Editor-in-Chief of Interference Technology. He spent the first half of his career as a hardware-system systems engineer and program managerand the second half as a technology journalist, science writer and educator. John is an affiliate professor of systems engineering at Portland State University and lecturer for UC-Irvine’s online IoT program.

AI firsts (and more) at America’s SEMICON

SEMICON West showed a distinct thematic shift away from preserving Moore's Law to assessing the architectural implications of AI, as EDA was brought into the event.
September 13, 2019

Introduction to the Compute Express Link (CXL) device types

A look at the device types defined by the Compute Express Link (CXL) standard.
Article  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , , ,   |  Organizations:

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors