Marco Casale-Rossi |  April 10, 2013
It’s time to take up the challenge of applying 3D integration technology to IC design. The manufacturing process technology is maturing, the tool chains are in place, and the opportunities to broaden your market by applying a new form of systemic integration are growing.
Richard Goering |  April 10, 2013
An increasingly important concept in design is that of product creation. An approach based on product creation looks beyond chip or board design.
Michael Sanie, Synopsys |  April 4, 2013
Debug of logic and testbench debug makes up 35% of chip design, and is growing as power-management and hardware/software issues become part of the task.
Nithya Ruff |  February 12, 2013
Now companies in any tier can use development kits as a platform to speed development, bridge the hardware-software divide and build out ecosystems quickly.
Neill Mullinger |  January 24, 2013
How should you quiz your verification IP vendor to get the right VIP for your needs? Synopsys' Neill Mullinger details a checklist of the key points to raise.
David Fried |  December 4, 2012
finFETs are vital to the next generation of CMOS processes from Intel, TSMC and others. How will process issues including bulk vs SOI substrates, density limitations, thickness control, and planar device integration affect their practical implementation?
Steve Pateras |  November 16, 2012
Mentor's Stephen Pateras explains how the proposed IJTAG standard speeds IP test by replacing time-consuming custom and ad hoc methodologies.
Marco Casale-Rossi |  November 16, 2012
The advantages and challenges of 3D IC integration, as we add vertical functional integration options to the traditional planar integration brought by the progress of Moore's Law.
Anil Khanna |  November 13, 2012
Embedded hardware and software are experiencing exciting advances but free, open source technologies only go so far in connecting them. Help is on the way.
Tong Gao |  October 11, 2012
Manufacturability, routing, library design and more - it all needs rethinking at 20nm, writes Tong Gao of Synopsys.