'Design for yield' is a familiar term, but the challenges in today's increasingly large projects make a refresher on what it offers particularly timely.
Lithography is only just beginning to play a role in cell IP selection but early analysis already matters.
How the HPC company used Synopsys' Lynx Design System to standardise its flow and simplify migration to the next node.
What ARM learnt when it ran a Mali GPU-based test chip through a Synopsys tool flow onto a TSMC 20nm process
The article describes a novel optimization approach that extends leading methodologies to improve performance, power and area. It is based on a pre-generated cell library that extends commercially available foundry libraries and couples it with novel logic optimization to aim for the delivery of near full-custom performance levels. The approach assesses the gate-level netlist generated [...]
The limited cell count of standard cell libraries is restricting the performance that designs can achieve without resorting to expensive and time-consuming techniques. This article describes the addition of extended cell libraries and novel synthesis tools to a traditional RTL-to-GDSII flow in a new methodology that helps to overcome this performance brake. The technique is [...]
The paper describes several innovative modifications to standard design flows that enable new device technologies to be rapidly assessed at the system level. Cell libraries from these rapid flows are employed by a design flow description language (PSYCHIC) for the exploration of highly speculative ‘what if’ scenarios. These rapid design flows are used to explore […]
When microprocessor core developer ARM started in a barn outside Cambridge, England, just over fifteen years ago, odds were against it making a global impact. The team of “12 engineers and me”, as then CEO and now chairman Sir Robin Saxby puts it, “had no patents, a working prototype and £1.75m of cash.” Without the […]