Guides - Tech Design Forum Techniques

VHDL is a hardware description language with rich constructs that can model complex systems. It can also be constrained for use as the starting point of an FPGA or ASIC design.

The scheduler is a key component of any real-time operating system (RTOS). This guide describes the concepts employed by common schedulers and the policies they employ.

More than half of design companies claim to use ABV but many have yet to deploy full methodologies.

Building a prototype SoC in one or a set of FPGAs can aid field trials, software development and hardware/software integration. But it's not easy, so the decision to go ahead needs careful consideration.

Verification IP is becoming an increasingly important component for system design due to the rapid proliferation of new protocols and interfaces, chiefly driven by mobile comms.

How SystemC enables system modelling at higher levels of abstraction, and the creation of virtual platforms.

It may be necessary to move to three-dimensional 'FinFET' transistors for future process nodes, but what impact will this have on circuit design?

Fully depleted silicon on insulator (FD-SOI) transistor architectures may offer speed and power advantages, at the cost of a shift to non-standard substrates.

Transaction-level modeling (TLM) describes a system by using function calls that define a set of transactions over a set of channels.

Double patterning provides an alternative to using EUV lithography – making it possible to implement ICs on sub-28nm processes.