The prospects for GALS: Real Intent’s view
Real Intent CTO Pranav Ashar talks about GALS: the reasons for and against using asynchronous protocols for chip-crossing communications and what to do about verification.
Author Archives: Chris Edwards
HP: bring us your hardware, your workloads, your mass of data
HP is throwing open its doors to other companies to bring in the necessary hardware and low-level software to build a new generation of servers, each specialized to a workload.
Altera to go 64bit with ARM on FPGAs
Altera will add a quad-core 64bit ARM processor complex to the Stratix 10 family of high-end FPGAs that will be made on Intel's 14nm finFET process.
ARM launches communities and asks for IoT ideas
ARM has launched at TechCon its own crop of online forums intended to let engineers collaborate and share ideas and has asked for IoT ideas.
Qt stack aims to cut user interface design time
Digia has launched a graphical user interface development suite based on Qt that is aimed at embedded devices running Linux and Android.
ARM v8-R launch focuses on safety applications
ARM has launched the -R version of its v8 architecture, targeting applications in automotive and industrial systems and possibly spawning a new generation of Linux-oriented microcontollers.
Memory gets smarter for network speedups
Memoir Systems has developed a set of memory controller IP cores that exploit common access patterns used by processors in network switches to improve performance and power consumption
CDNLive calls out for papers
Cadence Design Systems has issued a call for papers for the European leg of its CDNLive of events for 2014. The deadline for the Silicon Valley event is also looming: the call closes mid-November 2013.
Cadence launches IP cores for 60GHz wireless and consumer audio
Cadence Design Systems has launched IP cores for high-end mobile audio as well as gigasample ADCs for 28nm to support 60GHz wireless.
Cadence parallelizes FastSpice for large-scale mixed-signal checks
Cadence Design Systems has developed a version of its Spectre FastSpice tool that splits simulation across many computers without manually cutting the design into segments.