Altera to go 64bit with ARM on FPGAs

By Chris Edwards |  No Comments  |  Posted: October 29, 2013
Topics/Categories: Blog - Embedded, PCB  |  Tags: , , , , ,  | Organizations: ,

Altera will add a quad-core 64bit ARM processor complex to the Stratix 10 family of high-end FPGAs that will be made on Intel’s 14nm process. The FPGA maker sees the growth of software-based development being an important driver for high-capacity programmable logic.

Danny Biran, senior vice president of corporate strategy and marketing at Altera, said: “Heterogeneous computing is gaining more traction. The advantage of doing it on FPGA is that you also get the programmable-logic fabric. One of the opportunities and challenges for FPGAs is that in order to enter these markets we need to cater for software engineers.”

Altera sees OpenCL, standardized by the Khronos Group, as key to giving software engineers access to programmable logic. Originally the OpenCL language was developed to make it easier to port parallelized code to graphics processing units (GPUs). The most efficient way to use GPUs is to send parcels of data to them and have them work intensively on those blocks in local memory. This can result in high latencies, particularly for one- rather than two- or three-dimensional data. Because they have much greater control over memory accesses and can pipeline them efficiently, FPGAs do not necessarily need to work with fixed local memory buffers.

OpenCL for streaming data

“We are working on adding new features to OpenCL such as streaming, which are very beneficial to FPGAs,” Biran claimed. “It will be part of the next official release.”

OpenCL uses a host general-purpose processor to send work to programmable coprocessors and tasks written in the language will often run alongside other support code in both data-center accelerators – Altera has put a lot of emphasis on financial-trading applications in recent years – as well as embedded systems handling radar or data communications.

“We see the techniques used in high-frequency trading extending to other data-center applications such as search,” said Biran, adding that these applications can make effective use of high-capacity FPGAs. “At 28nm we only have a processor subsystem in the midrange and low cost families. We liked what we saw and decided to extend to the high-end as well.

Quad-core Cortex-A53

“We will offer a quad-core ARM Cortex-A53. The main reason we chose this was that we looked at the various ARM offerings and at the target applications. We decided that this offered the best combination of performance and power efficiency. The throughput will be at least six times higher than the current generation,” said Biran.

On its midrange FPGAs, Altera currently offers a dual-core ARM Cortex-A53. As well as moving to a 64bit architecture to allow access to large memory arrays and boosting the number of cores, Altera will upgrade the digital signal processing (DSP) building blocks that it offers.

“We have new DSP capabilities in Stratix 10, both fixed and floating point,” said Biran. “We chose this architecture because it’s very versatile. The combination of the A53 with DSP and high-performance fabric allows you to address these high-performance applications in data centers, telecom and radar.

“We continue to invest a lot in OpenCL. We continue to develop new libraries for specific applications,” said Biran.

Process split

Whereas the forthcoming midrange communications-oriented Arria 10 FPGAs will use TSMC’s 20nm process, Altera wants the extra performance available from Intel’s finFETs for Stratix 10. Biran said: “With Stratix 10 we can get a 2x performance increase or 70 percent power saving. This is the first FPGA that will get into the 1GHz domain [for the user logic on the programmable fabric].

Biran claimed Intel’s delay to the introduction of its 14nm process, expected to last a quarter of a year, will not affect Altera’s plans. “It shouldn’t really affect us. We haven’t announced the schedule details of Stratix 10 but we never meant to be on the leading edge of the process. We used to do that with TSMC but it’s not the case here. A quarter’s delay will not affect our schedules at all.”

Memory support for Stratix 10 will include DDR4 and Hybrid Memory Cube, Biran said, together with options for greater integration: “One of the things we announced when we talked about Stratix 10 was that it will have some unique 3D integration capabilities. It will be interposer-based but 3D integration is one of the directions we are taking,” Biran said.

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