The emulator thrives as verification models mushroom
Emulators have come a long way since their first introduction nearly three decades ago.
EDA Topics
Team UVM and emulation for testbench acceleration
To verify large, complex designs and meet time-to-market, you must use both simulation and emulation.
Are you formally secure?
A look at how formal verification strategies can be used to check the security feature of complex SoCs for potential data leakage and data integrity issues
How Google and Qualcomm exploit real world HLS and HLV
By taking a pragmatic approach, the two technology giants have comfortably adopted high-level synthesis and verification - and have shared their experiences.
Comparing your design to itself – a crucial part of verification
Sequential equivalence checking can help trap errors introduced by clock gate insertion, uninitialised registers, and X propagation issues.
Bit width tweaks point way to practical deep learning
In both data centers and automobiles deep learning is taking hold. But it is a technique that challenges conventional microprocessors, leading system designers to look at alternative architectures for acceleration.
How continuous integration with Jenkins serves verification flows
A technique built for software development is now helping hardware engineers master increasingly complex verification flows.
Implementing USB Type-C
A look at three design challenges for USB Type-C: implementing two SuperSpeed datapaths on a reversible connector; partitioning the design to support multiple USB Type-C variants; and partitioning the management software.
Still using Moore’s Law to beat up on the automotive industry?
These days, when it comes to innovation: The car's the star - not the stooge.
Accelerating Android bring-up using VDKs in the LAVA framework
Accelerating software testing is vital to speeding up embedded system development, especially for Android and Linux systems running on ARM-based hardware. Virtual prototyping strategies, including the use of VDKs, can help.