EDA Topics

April 23, 2018
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The three critical data validation points in a design flow

Why design data integrity matters from cell design to tapeout. These techniques will help ensure your validation process is as comprehensive as possible.
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April 23, 2018

How eFPGAs will help build the brave new world of AI

Artificial intelligence and machine learning require the performance and flexibility offered by embedded FPGA (eFPGA) technology.
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April 17, 2018
Guido Groeseneken is an Imec fellow, researching advanced devices and the reliability physics of sub-10nm CMOS technologies.

Reliability research helps to create new technologies

Insights from research into reliability at Imec led to self-learning chips, security technologies, and finFET biosensors.
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April 9, 2018

ISO 26262 – The Second Edition: what’s in it… and what isn’t

A new version of the automotive safety standard arrives later this year. Review the main updates and see how it will combine with the incoming SOTIF autonomous driving standard.
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March 29, 2018
Two wafers fabbed at Imec

3DIC technology provides performance boosts

3D integration technology has split into a number of different approaches, each of which brings a different combination of benefits in terms of performance.
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March 23, 2018
Ashish Darbari is CEO of formal verification consultancy Axiomise.

Doc Formal: My 10 golden rules

Ashish Darbari sets out the fundamental qualities of a successful formal verification project.
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March 19, 2018
Dr Lauro Rizzatti is a verification consultant and industry expert on hardware emulation.

How hardware emulation helps drones take flight

In an exclusive interview, Lauro Rizzatti discusses the increasing verification challenges for drone SoCs with Bo Shen, founder of fabless specialist Artosyn.
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March 9, 2018
Saunder Peng is a Senior Application Engineer with Mentor, a Siemens Business. He received his B.S degree in Electrical Engineering from the University of California at Los Angeles, and his M.S. in Electrical Engineering from Columbia University, New York.

A better way to merge design files for physical verification

Still using custom layout or place and route tools here? Ditch that time-consuming practice for a real database merge flow.
February 28, 2018

How to achieve more accurate NAND soft-bit error injection

The article describes a pre-silicon strategy for the design and verification of SSD controllers that is faster and more flexible than ICE using physical NAND on a daughter-card.
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February 27, 2018
Gordon Cooper

Optimizing power and performance trade-offs in CNN implementations for embedded vision

High-performance vision-processing algorithms need optimized CNN engines to deliver the right performance within the power budget of embedded applications.
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