October 5, 2018
Innovative methodologies, strategies and tool features help overcome other inefficiencies in complex but necessary simulations.
July 23, 2018
Doc Formal sets out the 10 cost points in verification that formal will help you control and reduce.
May 8, 2018
Ashish Darbari describes a formal technique that fuels a rapid, predictable and highly effective methodology.
December 22, 2017
In-design DRC is a technique that frees up engineers from many of the challenges of delivering AMS design under ever more complex design rules.
December 5, 2017
Ashish Darbari concludes his series on the need for new verification strategies by considering Debug and Signoff & Review.
June 13, 2017
Techniques previously unavailable during ICE or testbench acceleration can now greatly speed emulation debug in those modes.
October 19, 2015
Verification IP can help verify that memory-controller implementations meet standards; test an implementation against specific memories; and drive traffic for SoC verification and power analysis. Here's how to choose it.
August 21, 2015
Emulation performance is a key metric in verification. But it is far from being the only consideration. How long it takes to get a design onto a verification platform and aspects such as debug are as important. These factors will control how verification platforms are deployed during a project's life cycle.
August 4, 2015
The introduction of bigger FPGAs enables more complex prototypes - but makes debugging more of a challenge. Here's one way to address the issue.
November 6, 2014
Need to convince your FD of emulation’s growing ROI and the need to invest? Click here and ‘Forward’