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June 13, 2017
Hardware emulation gets smarter with save-and-restore for debug
Techniques previously unavailable during ICE or testbench acceleration can now greatly speed emulation debug in those modes.
Article | Topics:
EDA - Verification
| Tags:
checkpoints
,
debug
,
emulation
,
ICE
,
save-and-restore
,
testbench acceleration
| Organizations:
Mentor Graphics
,
Siemens EDA
EDA Topics
DFM
DFT
ESL
IC Implementation
Verification
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