Chipmaker

The single core processor is reaching its performance ceiling, due to energy, thermal and power concerns. To address these issues that cause design difficulties, many embedded designers are migrating embedded applications from single core to multicore. This article provides an outline for a software strategy to progress from one core to two and beyond using [...]

The article offers a case study of the DFM planning and methodology applied during a shrink of Cambridge Silicon Radio's UF6000 system-on-chip from the 130nm to 65nm.

The article compares Google’s Android platforms to existing Linux builds, licensing regimes and the Windows CE operating system, and also describes how potential users can start to leverage existing hardware and software development kits and tools.

Length matching within a differential pair can be one of the more tedious tasks facing a PCB designer. This article describes how a team at communications and consumer electronics semiconductor company Broadcom overcame this by using the automation options available within their design tools. While the article describes automation tailored to a specific task, the […]

The paper describes several innovative modifications to standard design flows that enable new device technologies to be rapidly assessed at the system level. Cell libraries from these rapid flows are employed by a design flow description language (PSYCHIC) for the exploration of highly speculative ‘what if’ scenarios. These rapid design flows are used to explore […]

Justin Rattner will this year mark 35 years with Intel. His career with the technology giant has seen him collect numerous accolades, particularly for work in areas such as high performance computing (HPC). He was Intel’s first principal engineer and was its fourth member of staff to be named a fellow (he is today a […]

When engineers discuss the status and value of the Design Automation Conference (DAC), one topic tends to recur. Fairly or unfairly, the claim is that there has long been an inherent tension between DAC the technical conference and DAC the exhibition. In short, the technical conference has been seen as biased toward tool developers; the […]

Lew Counts It is not unusual for analog circuit designers to exhibit a wistful air of ‘been there, done that’, even if you would never catch them wearing the t-shirt. That goes double for Lewis Counts, vice president of analog technology at Analog Devices and a fellow with the sector giant. “There are things they’re […]

For a design targeted at the 130nm process node or below, the cost of a dedicated mask-set is getting brutal. At 130nm itself, a semiconductor company is likely to pay between $500,000 and $600,000 per set. That price tag rises to around $1m at 90nm, and to $1.5m at 65nm(Figure 2). One recent forecast for […]

How do we bridge the gap between the highly abstract view provided by traditional system-level design and the detailed implementation in RTL? The article answers this question by describing the components within an ESL methodology and illustrating its use via customer case studies. The methodology uses the ARM RealView SoC Designer tool and Tenison Design […]