Next week's DVCon Europe conference in Munich will tackle a range of topics, from analog verification to the use of machine learning for functional verification, backed up with case studies on the use of TLM and SystemC in live projects.
The New Horizons session at the conference will look at ways to combine techniques from traditional functional verification with machine learning to try to improve productivity and drive out more errors during the design process. Another session focused on the future of verification will look at the challenges of low-power and low-energy design and how this affects getting projects to the signoff stage.
Similar to previous years and recognizing the proximity of industries such as automotive, DVCon Europe will host a session on functional safety not just for conventional systems but those that give the vehicle's electronics greater autonomy on the road.
To reflect the growing interest in portable stimulus, the conference includes session on techniques for generating and curating stimuli that can be used at different levels of abstraction.
Alongside sessions on virtual platforms and virtual prototyping, sessions at the conference will also take in the challenges of analog and mixed-signal verification.