Verification

June 11, 2018
Jay Jahangiri, Product Manager for Mentor, a Siemens Business

How emulation’s SoC and SoS advantages begin with transaction-based co-modeling

An introduction to how virtual emulation has fueled the application of co-modeling for complex design verification.
May 9, 2018

Extend formal property verification to protocol-driven datapaths

Learn how planning and upfront knowledge of the challenges ahead can open up what has seemed a challenging task.
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May 8, 2018
Ashish Darbari is CEO of formal verification consultancy Axiomise.

Doc Formal: Harness the power of invariant-based bug hunting

Ashish Darbari describes a formal technique that fuels a rapid, predictable and highly effective methodology.
May 4, 2018
Dr Lauro Rizzatti is a verification consultant and industry expert on hardware emulation.

Cutting through the AI hype with OneSpin’s Raik Brinkmann

Lauro Rizzatti gets a reality check on AI for both design tools and designs themselves from the formal verification specialist.
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April 23, 2018
data validation featured image

The three critical data validation points in a design flow

Why design data integrity matters from cell design to tapeout. These techniques will help ensure your validation process is as comprehensive as possible.
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April 9, 2018

ISO 26262 – The Second Edition: what’s in it… and what isn’t

A new version of the automotive safety standard arrives later this year. Review the main updates and see how it will combine with the incoming SOTIF autonomous driving standard.
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March 23, 2018
Ashish Darbari is CEO of formal verification consultancy Axiomise.

Doc Formal: My 10 golden rules

Ashish Darbari sets out the fundamental qualities of a successful formal verification project.
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March 19, 2018
Dr Lauro Rizzatti is a verification consultant and industry expert on hardware emulation.

How hardware emulation helps drones take flight

In an exclusive interview, Lauro Rizzatti discusses the increasing verification challenges for drone SoCs with Bo Shen, founder of fabless specialist Artosyn.
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March 9, 2018
Saunder Peng is a Senior Application Engineer with Mentor, a Siemens Business. He received his B.S degree in Electrical Engineering from the University of California at Los Angeles, and his M.S. in Electrical Engineering from Columbia University, New York.

A better way to merge design files for physical verification

Still using custom layout or place and route tools here? Ditch that time-consuming practice for a real database merge flow.
February 28, 2018

How to achieve more accurate NAND soft-bit error injection

The article describes a pre-silicon strategy for the design and verification of SSD controllers that is faster and more flexible than ICE using physical NAND on a daughter-card.
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