shorts

November 22, 2019
Raghav Katoch is a product engineer with the Calibre physical verification team at Mentor, a Siemens business.

Improve your LVS debug productivity

A look at ways to improve LVS debug productivity on complex SoCs through more narrowly targeted debug strategies.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , ,

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors