EDA

How virtual hardware can speed up many aspects of automotive system development, including architectural analysis, software development and verification

Hierarchical DFT is vital for large, complex designs. Users still to transition to the technique can nevertheless exploit its pattern reuse strategies as they move toward adoption.

Using deep learning techniques and convolutional neural networks to bring facial recognition capabilities to embedded systems.

DVCon China general chair Andy Liu discusses Accellera’s new addition to its design and verification conference series (简体中文).

DVCon中国大会主席刘红亮讨论了Accellera新增的DVCon中国ASIC设计和验证会议的看点。

Addressing the challenge of achieving ASIL D certification of the functional safety of an SoC for use in the safety-critical path of an automotive system.

Thinner phones are going to need new connectors. Many designers are considering USB Type-C, and the related Audio Device Class 3.0 specification (ADC 3.0), for use in high-quality digital headsets.

Portable stimulus and formal verification provide the means to handle the challenge of verifying cache-coherent SoC interconnects.

SSD controllers are becoming increasingly complex and as a result emulation is now the first choice for SSD verification. But your strategy must still meet five key criteria.

Richard Pugh looks at how innovations highlighted during the recent International Memory Workshop are driving the solid state drive (SSD) market.