Embedded Topics

January 9, 2018
HBM article featimg

Choosing between DDR4 and HBM in memory-intensive applications

Exploring the tradeoffs between implementing DDR4 and HBM for high-bandwidth memory subsystems.
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November 6, 2017
Rich Collins of Synopsys

Fighting the war of escalation in embedded systems security

The challenge for designers is to find ways of providing high levels of security in low-cost devices that have become worthwhile targets because of their role as gateways to more valuable information.
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October 30, 2017
Debug case study for ARM/AXI based design

Case study: Verifying and optimizing software for power on SoCs

How emulation was used to debug out-of-spec power on a multicore ARM design using the AXI bus.
October 14, 2017
Michael Chen is Director, Design for Security, in the New Ventures Division of Mentor, a Siemens Business.

Making security a profit center for silicon

The assumption has been that extra security eats into profit margins. But with some lateral thinking it can actually improve the bottom line.
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August 7, 2017
Pedro Ricardo Miguel

Supporting higher-resolution displays without major system redesign

Using VESA's Display Stream Compression (DSC) standard to enable visually lossless performance and low latency for ultra-high-definition displays.
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July 18, 2017
Richard Solomon, technical marketing manager, Synopsys

Using CCIX to implement cache coherent heterogeneous multiprocessor systems

CCIX is a cache coherency protocol, based on PCI Express, for interconnecting high-performance heterogenous multiprocessing systems.
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July 11, 2017
subthreshold featimg

Applying sub-threshold circuit techniques to IoT device design

Operating at near-threshold or sub-threshold voltages reduces static and dynamic power consumption, at the cost of design complexity.
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June 29, 2017
Gordon Cooper

High-resolution visual recognition needs high-performance CNNs

Quadrupling the performance of a dedicated CNN engine within an embedded vision processing core brings more complex graph processing within reach.
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June 18, 2017

Portable stimulus

Accellera's Portable Stimulus standard aims to improve verification efficiency and the reuse of test IP across the entire design life cycle.
June 7, 2017
Diag 4

Staging virtual prototype bring-up for faster software development

How staging virtual prototype bring-up can accelerate the development of embedded software in complex systems.
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