How to optimize test patterns based on critical area
The world of ATPG just changed with the introduction of a new way to create and choose the most effective test patterns.
test
Finding and fixing faults in finFET memories
FInFET memories have different defects than those based on planar transistors. Here's how to test and repair them.
20nm
The 20nm node can offer power, performance and area advantages, but making these gains takes a deep understanding of the interactions between process and design.
PLATINUM SPONSORS
View All Sponsors