EDA

If we thought about verfication-for-security in a different way, the Spectre and Meltdown vulnerabilities could well have been avoided.

Building secure SoCs takes a methodical approach, careful study of possible attacks, and embedded hardware that can provide a Root of Trust

How to get the best PV results by reducing computational demands; handling data more efficiently and exploiting parallelization.

Exploring the tradeoffs between implementing DDR4 and HBM for high-bandwidth memory subsystems.

Achieving ISO 26262 certification for advanced driver assistance systems takes a combination of ASIL ready IP and rigorous development strategies.

In-design DRC is a technique that frees up engineers from many of the challenges of delivering AMS design under ever more complex design rules.

Introducing one of the latest refinements of formal and showing how ArterisIP and Oski Technology used the strategy on an ARM-based design.

Ashish Darbari concludes his series on the need for new verification strategies by considering Debug and Signoff & Review.

Richard Pugh shows how the fast-growing market for drone silicon highlights emulation's power where high data volumes are critical.

In part two of this series, Ashish Darbari introduces a checklist to address verification challenges and build the meta model.