The paper describes some of the main challenges in the latest process shrink for the Cell Broadband Engine, developed jointly by IBM, Sony and Toshiba. The authors show how the move from a 65nm to a 45nm SOI process was achieved by concentrating on four primary goals: automating the migration; setting a 30% power reduction […]
Electronic system level (ESL) is typically defined as design above the register transfer level (RTL). When applied to hardware design, ESL is the process of describing hardware functionality at higher levels of abstraction to increase designer productivity and enable greater degrees of exploration. With ESL, hardware designers no longer spend most of their time designing […]
Justin Rattner will this year mark 35 years with Intel. His career with the technology giant has seen him collect numerous accolades, particularly for work in areas such as high performance computing (HPC). He was Intel’s first principal engineer and was its fourth member of staff to be named a fellow (he is today a […]
Given present-day demands for environmentally friendly, renewable energy sources, solar energy is becoming increasingly attractive. However, while solar energy is free, non-polluting and, in practical terms, inexhaustible, there remain significant inefficiencies in capturing it. For example, solar panels are traditionally fixed and in this configuration cannot capture the maximum amount of sunlight during changing weather […]
When engineers discuss the status and value of the Design Automation Conference (DAC), one topic tends to recur. Fairly or unfairly, the claim is that there has long been an inherent tension between DAC the technical conference and DAC the exhibition. In short, the technical conference has been seen as biased toward tool developers; the […]
The Open Virtual Platforms (OVP) initiative aims to help resolve the difficulties that arise today when modeling multicore systems-on-chip (SoC) so that designers can perform early and timely test of the embedded software that will run on the end devices. As architects continue to add more cores to meet hardware design goals, the complexity of […]
ARC International is one of the largest suppliers of configurable processor technology. It licenses patented configurable multimedia subsystems and CPU/DSP processors that are used to design differentiated products. They are optimized for use in systemson- chip (SoCs) that consume less power, are less expensive to produce and require protection from cloning. The ARC Energy PRO […]
Although no EDA company counts among its membership (for good practical reasons), it is fair to describe the US Consumer Electronics Association (CEA) as one of technology’s most broadly representative trade bodies. From retailers and brand holders to the hardware and software companies that directly supply components for CE products, the CEA has a position […]
The real objective of design for manufacturability (DFM) is to improve a product’s profitability and manufacturing predictability for its market window and unit volume by optimizing tradeoffs between design costs and manufacturing improvements according to a holistic, lifetime view of the product. Current DFM practice often falls far short of that goal. For instance, the […]
The headline number in the Consumer Electronics Association’s (CEA) latest market forecast contained a few devils in the detail, although the sector does seem poised to defy more pessimistic views of the economy’s prospects. The projection of 6.1% growth for 2008 is robust, giving just over $171bn in US factory door sales (Figure 1).Meanwhile, GDP […]