According to the International Monetary Fund’s (IMF) latest World Economic Outlook, the possibility of a ‘double-dip’ recession cannot yet be discounted even if current data show the world economy beginning to recover. The IMF’s main concern is that private demand (including consumer spending) is not showing enough strength to restore consistent global GDP growth by […]
System-in-package (SiP) used to be thought of as a ‘poor man’s system-on-chip’ (SoC). Not any more. The complexity involved in implementing various levels of functionality on a single SoC is reaching such levels that it is becoming increasingly difficult to justify the design and manufacturing costs. Similarly, the need to deliver products within equally tight […]
The article provides an overview of one common theme in the papers presented at a special session of the 2009 Design Automation Conference, Dawn of the 22nm Design Era. As such, we would recommend that readers wishing to access still more detail on this topic (in particular, on device structures for 22nm and project management […]
When we first reviewed the consumer electronics market at the beginning of the year, there were still hopes that growth could remain statistically flat despite global economic woes. However, at the beginning of the summer, the Consumer Electronics Association revised its forecast down from January’s -0.7% to -7.7%, implying total factory-gate sales of $165B. The […]
The article presents the context for the use of computation scaling (CS) to eke out more from existing lithography tools until next-generation techniques are finally introduced. It discusses the critical elements in the CS ecosystem developed by IBM and partners to overcome roadblocks to optical scaling that demand the use of non-traditional techniques for the […]
Since 130nm, you have either had an innovative approach to low-power design, or you have not had a business. From that node onwards, low-power requirements began to match raw performance in driving the R&D agenda. Where the cutting edge was once defined by communications infrastructure and programmable logic, consumer electronics (CE) started to become ever […]
The architectures that underpin today’s traditional place-and-route tools are showing their age, largely because their static timing analysis engines cannot handle more than two mode/corner scenarios. Thus limited, the software struggles to effectively implement low-power design techniques beyond such established concepts as clock gating and multiple threshold voltages. Designers run into difficulties when trying to […]
Chemical mechanical polishing (CMP) has traditionally been considered an enabling technology. It was first used in the early 1990s for BEOL metallization to replanarize the wafer substrate thus enabling advanced lithography, which was becoming ever more sensitive to wafer surface topography. Subsequent uses of CMP included density scaling via shallow trench isolation and interconnect formation […]
The Oasis file format is intended as the long-term successor to GDSII, which is now 30 years old. However, even though the first specification for Oasis was released in 2004, there is still a great deal of confusion and ignorance surrounding the standard. The article looks at the background of Oasis’ development, identifies its strengths […]
