Synopsys

March 15, 2017
DVCon China takes place at the Parkyard Hotel, Shanghai on April 19th.

DVCon中国将于4月在上海亮相

DVCon中国大会主席刘红亮讨论了Accellera新增的DVCon中国ASIC设计和验证会议的看点。
Article  |  Topics: EDA - Verification  |  Tags: , , , , , , ,   |  Organizations: , , ,
March 7, 2017
Angela Raucher is product line manager for Synopsys’ ARC EM processors.

An accelerated approach to achieving automotive safety with ASIL D

Addressing the challenge of achieving ASIL D certification of the functional safety of an SoC for use in the safety-critical path of an automotive system.
Expert Insight  |  Topics: Embedded - Architecture & Design, IP - Selection, EDA - Verification  |  Tags: , , , ,   |  Organizations:
March 3, 2017

Reducing the power consumption of USB Type-C digital headsets

Thinner phones are going to need new connectors. Many designers are considering USB Type-C, and the related Audio Device Class 3.0 specification (ADC 3.0), for use in high-quality digital headsets.
Article  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , ,   |  Organizations: ,
January 18, 2017
Anders Nordstrom, senior corporate applications engineer, Verification Group, Synopsys

Are you formally connected?

To check the connectivity of an SoC, first you have to define what a connection is...
Expert Insight  |  Topics: IP - Assembly & Integration, EDA - Verification  |  Tags: ,   |  Organizations:
January 11, 2017
Derek Bouius

Three steps to implementing robust encryption

A look at the steps necessary to validate implementations of the cryptographic algorithms that are used to protect today’s devices and communications infrastructure.
Expert Insight  |  Topics: IP - Selection, EDA - Verification  |  Tags: , , , , ,   |  Organizations: ,
December 16, 2016
Robert Vamosi, CISSP and security strategist at Synopsys

Software validation strategies for connected cars

Software validation strategies will become increasingly important as cars become more complex, connected and autonomous.
Expert Insight  |  Topics: Embedded - Architecture & Design, EDA - Verification  |  Tags: , ,   |  Organizations:
December 12, 2016
Eric Huang, Synopsys

USB 2.0 as an integration standard for IoT products

USB 2.0 could become an integration standard for IoT SoCs, due to its ubiquity, available drivers, support for rapid prototyping, and area efficiency.
Expert Insight  |  Topics: Embedded - Architecture & Design, Integration & Debug, IP - Selection  |  Tags: , , ,   |  Organizations: ,
December 2, 2016

Hierarchical signoff of SoC designs at advanced process nodes

Hierarchical signoff strategies for large SoCs at advanced nodes can be effective if sufficient attention is paid to reflecting the impact of cross-hierarchy parasitics.
November 29, 2016
Ken Brock, product marketing manager, Synopsys

Six ways to exploit the advantages of finFETs

FinFET processes and libraries are maturing, enabling designers to explore the best ways to take advantage of the capabilities of the new transistor design
Expert Insight  |  Topics: EDA - IC Implementation, IP - Selection  |  Tags: , , ,   |  Organizations: ,
November 22, 2016
Visual: cars speeding along a road

Implementing DDR DRAM in automotive applications

A look at how DDR DRAM is being adapted for use in automotive systems, and the demands its use puts upon interface IP for SoCs.
Article  |  Topics: IP - Selection  |  Tags: , , , , ,   |  Organizations: ,

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