As the market continues to push for higher performance at lower cost, trusted personal devices (TPDs) must also be able to exchange greater volumes of data, voice or streaming video at ever higher bit rates, while transmitting and receiving securely under multiple telecommunication standards. Reductions in cost and time-to-market can only be achieved by integrating […]
Andre Geim When you were young, did you enjoy bouncing around on a trampoline? If so, try this for size. Imagine a membrane about 275 miles long, one mile deep and an average of 10 miles wide. These dimensions matter. Because this sheet of material covers the entire Grand Canyon—and before you go bouncing on […]
The process of proving the system is working and performing optimally, under all application and environmental conditions, has become too inefficient and difficult for existing methodologies. Traditional methods for addressing post-silicon requirements have reached the point of diminishing returns. What was once an exercise of designing, implementing and verifying 25,000 to 50,000 gates of instrumentation […]
Software accounts for more than half the development cost for a complex system-on-chip (SoC) platform at the 45nm process node or below. The availability of fundamental software such as compilers, debuggers, operating systems and industry-specific middleware determines the success or failure of a chip design. In simple terms, if there is little or no software […]
The article describes how methodologies such as graph-based intelligent testbench automation will help engineers efficiently create verification scenarios and stimuli. This is a powerful way of enhancing advanced verification environments and reducing common verification headaches (e.g., reaching coverage goals). Such strategies can help to free up resources, in terms of time, people and hardware, so […]
The article describes an algorithm that combines performance and variation objectives in a behavioral model for a given analog circuit topology and process. The tradeoffs between performance and yield are analyzed using a multi-objective evolutionary algorithm and Monte Carlo simulation. The results indicate a signi?cant improvement in overall simulation time and ef? ciency compared to […]
The Oasis file format is intended as the long-term successor to GDSII, which is now 30 years old. However, even though the first specification for Oasis was released in 2004, there is still a great deal of confusion and ignorance surrounding the standard. The article looks at the background of Oasis’ development, identifies its strengths […]
Richard Goering System-on-chip designers who work with third-party silicon intellectual property (IP) will see some significant changes at 32nm and below. Physical IP will be highly optimized to specific processes, following intense collaborations between large IP providers and foundries. Processor IP may become less synthesizable and make more use of hard macros. On the plus […]
Guy Haas Managing EDA software involves more than monitoring and studying usage across various tools and features. An effective approach will help the enterprise reduce engineering software costs, reach better and more informed business decisions, become more responsive and ensure compliance with software licenses. To understand how to develop such strategies, we need to look […]
From its inception, the OCP standard was designed to address the advent of heterogeneous processors and multicore SoC development. Since the OCP-IP organization opened for business in December 2001, it has established eight technical working groups (WGs) to develop tools, technologies and products that support the standard, leading in turn to the release of a […]
