Mind how you go. The only truly free thing about open source tools is the download itself. There is, however, a 'third way', matching professional support to these often useful options.
It’s time to take up the challenge of applying 3D integration technology to IC design. The manufacturing process technology is maturing, the tool chains are in place, and the opportunities to broaden your market by applying a new form of systemic integration are growing.
An increasingly important concept in design is that of product creation. An approach based on product creation looks beyond chip or board design.
Debug of logic and testbench debug makes up 35% of chip design, and is growing as power-management and hardware/software issues become part of the task.
Now companies in any tier can use development kits as a platform to speed development, bridge the hardware-software divide and build out ecosystems quickly.
How should you quiz your verification IP vendor to get the right VIP for your needs? Synopsys' Neill Mullinger details a checklist of the key points to raise.
finFETs are vital to the next generation of CMOS processes from Intel, TSMC and others. How will process issues including bulk vs SOI substrates, density limitations, thickness control, and planar device integration affect their practical implementation?
Mentor's Stephen Pateras explains how the proposed IJTAG standard speeds IP test by replacing time-consuming custom and ad hoc methodologies.
The advantages and challenges of 3D IC integration, as we add vertical functional integration options to the traditional planar integration brought by the progress of Moore's Law.
Embedded hardware and software are experiencing exciting advances but free, open source technologies only go so far in connecting them. Help is on the way.
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