Accellera Systems Initiative has published the language reference manual for the latest version of its mixed-signal simulation environment based on SystemC. Version 2.0 of SystemC-AMS adds support for more dynamic behaviors in the analog domain.
“In version 1.0 we were fairly static, using fixed time stages,” said Martin Barnasconi, product manager for design methodologies at NXP Semiconductors and chair of the SystemC working group at Accellera. “But the digital part a system can go to sleep or shut down temporarily – other parts of the system need to be autonomous and will react to changes in their environment.”
Barnasconi said the modelling support available in SystemC-AMS provides more flexibility than the wreal modelling available in the predominantly digital simulators built on core SystemC or Verilog. “For prototyping you need to look beyond wreal modelling. We have a dataflow solver that is more computationally efficient at dealing with analog constructs. And we deal with analog equation systems,” said Barnasconi. “An analog filter is an analog filter. You don’t want to model that with wreals.”
“I think we have some fairly smart algorithms in the simulator,” Barnasconi added.
“We spent three years on it and invested serious effort on it to ensure that we have a clean API. This is not a theoretical exercise. Parties are looking into simulators, regression environments and other tools,” said Barnasconi.
At the moment, there is not a reference implementation of a simulation environment that supports version 2.0. “Our ambition is that one of the Accellera members stands up to do this. Fraunhofer did an excellent job for version 1.0,” Barnasconi said, pointing to the proof of concept implementation released by Fraunhofer IIS/EAS earlier this month.
Members of the working group are writing the user’s guide to supplement the standard itself and to document the new features of the updated language. At a later stage, Accellera members will decide, as with other standards produced by the group, to take SystemC-AMS 2.0 through the IEEE standardization process. A 2011 white paper describes the basis for the dynamic timed dataflow simulation approach used in version 2.0.