June 1, 2006
Designers thinking about low power and energy have a variety of strategies at their disposal. The most common are: Process/libraries (e.g. low-power processes/libraries; high and low threshold voltage cells; and voltage scaling); Power and voltage domains; Clock gating; Low-power optimized clock synthesis; Low-power synthesis (e.g. automatic insertion of operand isolation circuitry); Implementation optimizations (e.g. operand […]
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June 1, 2006
Slowly but surely, the doors are opening. By that I mean that foundries and some IDMs are finally releasing significant amounts of fab process data for incorporation within the design for manufacturing content of EDA tools. Kudos must go to the IBM, Samsung and Chartered Semiconductor Manufacturing triumvirate for being first out of the gate. […]
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June 1, 2006
As the third wave of the digital revolution finally gains momentum, the chip industry is breaking loose from its homogeneous telecom/PC-centric confines – where everyone’s product and box essentially looked and worked the same – into the arms of the fragmented consumer-centric heterogeneous multimedia, with significantly more brand names and lots of different price points. […]
June 1, 2006
Walden Rhines The official mission statement of the EDA Consortium (EDAC) says that the organization exists “to promote the health of the EDA industry, and to increase awareness of the crucial role EDA plays in today’s global economy.” EDAC’s chairman Wally Rhines, also chairman and CEO of Mentor Graphics, amplifies this by explaining that the […]
March 1, 2006
DATE 06 (March 6-10) is the ninth edition of the Design Automation and Test in Europe conference and the organizers have again received a record number of submissions, this year 834. This reflects the fact that today DATE is not merely a European conference but has become a well-known global event, receiving paper proposals and […]
March 1, 2006
Introduction The emergence of the SystemVerilog and PSL assertion languages promises to improve the effectiveness of existing verification flows. First, assertions give better local observability of the functionality they represent. Second, the assertions augment the textual specification to provide a more formal, executable representation of the functionality. Third, since the assertion languages have common semantics […]
March 1, 2006
T he explosion in consumer electronics, especially in the wireless/handheld devices marketplace, has placed a tremendous technical and business burden on engineers in the design of these products. Design teams carry the responsibility of catering to often conflicting and always challenging product specifications. The product needs to be optimized on multiple demand vectors with little […]
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March 1, 2006
The advent of extreme fine line processes at 130nm or less presents many challenges. On the back end, optimizing a design to manage physical effects such as power, heat, and timing is more daunting than ever. At the front end, implementing a system-on-chip’s (SoC) behavior and features is becoming equally difficult. The early exploration of […]
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March 1, 2006
When microprocessor core developer ARM started in a barn outside Cambridge, England, just over fifteen years ago, odds were against it making a global impact. The team of “12 engineers and me”, as then CEO and now chairman Sir Robin Saxby puts it, “had no patents, a working prototype and £1.75m of cash.” Without the […]
March 1, 2006
Selecting the proper ADC can appear a formidable task. A direct approach is to go to the selection guides and parametric search engines. Enter the sampling rate, resolution, power supply voltage, and other properties. Click ‘find’. But can one approach the task with greater understanding — particularly of the main architectures — and get better […]