Volumes

For peripheral card and system manufacturers, delivering low-latency high-performance computing solutions at affordable prices has been an insurmountable barrier. Although processor speeds and bandwidth have taken quantum leaps over the last decade, the last few inches between the adapter slot and system CPU represent a bottleneck that restricts the development of cost-effective high-performance computing solutions. […]

More phlegmatic reactions to January’s Consumer Electronics Show were that it was “just like last year, only more so.” And, indeed, the big headlines went once more, to the companies that could claim bragging rights for 100-inch plus plasma screens; to Microsoft and Intel in their aggressive determination to force themselves beyond the PC and […]

For years, ASIC and FPGA designers have shared the goal of having totally reusable intellectual property (IP) blocks. This goal has been partially fulfilled, with the introduction of high-level hardware description languages such as VHDL and Verilog, and powerful Register Transfer Level (RTL) synthesis tools in the late 1980s and early 1990s. However, with a […]

DATE 06 (March 6-10) is the ninth edition of the Design Automation and Test in Europe conference and the organizers have again received a record number of submissions, this year 834. This reflects the fact that today DATE is not merely a European conference but has become a well-known global event, receiving paper proposals and […]

Introduction The emergence of the SystemVerilog and PSL assertion languages promises to improve the effectiveness of existing verification flows. First, assertions give better local observability of the functionality they represent. Second, the assertions augment the textual specification to provide a more formal, executable representation of the functionality. Third, since the assertion languages have common semantics […]

The IEEE Council for EDA has opened its website at www.c-eda.org. Earlier this fall, the IEEE Council for Electronic Design Automation (CEDA) took on formal existence with the election of its first officers. Design consultant and one time DAC general chair Alfred Dunlop is its launch president. He sets out why this is a great […]

Introduction Selecting the proper ADC can appear a formidable task, considering the thousands on the market. A direct approach is to go to the selection guides and parametric search engines. Enter the sampling rate, resolution, power supply voltage, and other properties. Click ‘find’. And hope for the best. But it’s usually not enough. How does […]

Introduction As semiconductor manufacturing moves into the sub-100nm realm, the need for increased cooperation and communication between design and manufacturing becomes more apparent. Manufacturing is becoming increasingly complex, and many of the principles that have guided design and manufacturing no longer apply. Some of the major changes occurring in wafer manufacturing include: The industry is […]

No one disputes the promise inherent in the concept of design reuse. But the true value of what has been delivered so far is often debated. This paper proposes a reuse methodology that is both practical and real and which uses behavioral synthesis as its driving technology. It discusses the most basic elements of behavioral […]

So far, the debate over design for manufacturing (DFM) has featured contributions from, principally, four groups: designers, manufacturers, EDA vendors and the consultancy community. It is becoming increasingly apparent that some other voices need to be heard and their positions integrated within any successful semiconductor DFM chain. One such group is fab equipment suppliers. The […]