Selecting the proper ADC can appear a formidable task. A direct approach is to go to the selection guides and parametric search engines. Enter the sampling rate, resolution, power supply voltage, and other properties. Click ‘find’. But can one approach the task with greater understanding — particularly of the main architectures — and get better […]
For peripheral card and system manufacturers, delivering low-latency high-performance computing solutions at affordable prices has been an insurmountable barrier. Although processor speeds and bandwidth have taken quantum leaps over the last decade, the last few inches between the adapter slot and system CPU represent a bottleneck that restricts the development of cost-effective high-performance computing solutions. […]
More phlegmatic reactions to January’s Consumer Electronics Show were that it was “just like last year, only more so.” And, indeed, the big headlines went once more, to the companies that could claim bragging rights for 100-inch plus plasma screens; to Microsoft and Intel in their aggressive determination to force themselves beyond the PC and […]
For years, ASIC and FPGA designers have shared the goal of having totally reusable intellectual property (IP) blocks. This goal has been partially fulfilled, with the introduction of high-level hardware description languages such as VHDL and Verilog, and powerful Register Transfer Level (RTL) synthesis tools in the late 1980s and early 1990s. However, with a […]
DATE 06 (March 6-10) is the ninth edition of the Design Automation and Test in Europe conference and the organizers have again received a record number of submissions, this year 834. This reflects the fact that today DATE is not merely a European conference but has become a well-known global event, receiving paper proposals and […]
Introduction A synthesized eye diagram begins with an accurate TDT measurement of a linear device. The validity of this approach has been proven across a number of case studies and is now commonly accepted in the communication industry. The measurement allows the device’s eye response to be accurately generated by an advanced synthesis algorithm such […]
We end the year with an issue of EDA Tech Forum that places perhaps more emphasis on design for manufacture than any before it, with opinions from Gartner Dataquest, Mentor Graphics and Applied Materials. These give readers a chance to view this often controversial and misunderstood area from three different but important perspectives: those of […]
The IEEE Council for EDA has opened its website at www.c-eda.org. Earlier this fall, the IEEE Council for Electronic Design Automation (CEDA) took on formal existence with the election of its first officers. Design consultant and one time DAC general chair Alfred Dunlop is its launch president. He sets out why this is a great […]
Introduction Selecting the proper ADC can appear a formidable task, considering the thousands on the market. A direct approach is to go to the selection guides and parametric search engines. Enter the sampling rate, resolution, power supply voltage, and other properties. Click ‘find’. And hope for the best. But it’s usually not enough. How does […]
Introduction As semiconductor manufacturing moves into the sub-100nm realm, the need for increased cooperation and communication between design and manufacturing becomes more apparent. Manufacturing is becoming increasingly complex, and many of the principles that have guided design and manufacturing no longer apply. Some of the major changes occurring in wafer manufacturing include: The industry is […]
