Introduction Selecting the proper ADC can appear a formidable task, considering the thousands on the market. A direct approach is to go to the selection guides and parametric search engines. Enter the sampling rate, resolution, power supply voltage, and other properties. Click ‘find’. And hope for the best. But it’s usually not enough. How does […]
Introduction As semiconductor manufacturing moves into the sub-100nm realm, the need for increased cooperation and communication between design and manufacturing becomes more apparent. Manufacturing is becoming increasingly complex, and many of the principles that have guided design and manufacturing no longer apply. Some of the major changes occurring in wafer manufacturing include: The industry is […]
No one disputes the promise inherent in the concept of design reuse. But the true value of what has been delivered so far is often debated. This paper proposes a reuse methodology that is both practical and real and which uses behavioral synthesis as its driving technology. It discusses the most basic elements of behavioral […]
So far, the debate over design for manufacturing (DFM) has featured contributions from, principally, four groups: designers, manufacturers, EDA vendors and the consultancy community. It is becoming increasingly apparent that some other voices need to be heard and their positions integrated within any successful semiconductor DFM chain. One such group is fab equipment suppliers. The […]
Companies and mask shops already have plans and policies to secure the storage and transmission of sensitive layout VLSI data. These include confidentiality and non-disclosure agreements, and encryption. However, traditional VLSI file formats such as GDSII never popularized the type of constructs that facilitate intellectual property (IP) protection. The OASIS format does have these constructs. […]
If you want to get a clear idea of just what is taxing engineers at any given time, you can do a lot worse than following the trends that emerge before each annual Design Automation Conference (DAC). “And this year, it is pretty clear that there are three things on everyone’s mind: power, system-level design […]
Once upon a time, placing even the smallest question mark next to Moore’s Law was seen as something beyond heresy. Today, more and more people are voicing such thoughts in the mainstream. One of the most senior figures speaking out is Bernard Meyerson, vice president and chief technologist of IBM’s Systems & Technology Group. The […]
Major yield-Inhibiting Issues At each successive process node, additional defect mechanisms appear and hinder the ability to achieve desired yield (Figure 1). The trend toward declining yields has led to a resurgence in the application of design for manufacturing (DFM) methodologies.Much of this reinvigorated effort relies heavily on a new breed of tools and technologies. […]
Semiconductor devices are being fabricated with features that are less than half the wavelength of the available lithography exposure tools. Increasing circuit density has improved the complexity and performance of ICs but also led to serious patterning proximity effects. These effects make the chips almost impossible to fabricate without optical proximity correction (OPC) technology. Thus, […]
Design teams are becoming increasingly concerned at the growing disparity between the capacity of silicon in the latest processes and the design and verification capabilities of simulation tools. A number of trends are now converging to enable a step function increase in verification to complement and extend the debug and verification capabilities of HDL simulators. […]
