directed self-assembly

The 10nm generation is the follow-on process to the 14nm/16nm node and will provide a choice of either finFET or planar FD-SOI architectures. But the likely absence of EUV will increase costs.

It is not just a choice between EUV and multiple patterning for future nodes, but even between varieties of multi-mask technologies. How will you decide?

If EUV is further delayed until 8nm, the industry has to explore other options for patterning, and the effects they will have on the DFM flow.