Joe Costello The dominant theme for DAC 2006 is multimedia, games and entertainment. So how does Cadence Design Systems founder and former CEO Joe Costello fit into that? He is after all giving the conference’s Monday keynote. Let’s do the ticklist. EDA credentials? Dated – he left Cadence in 1998 – but basically a ‘check’. […]
Design-for-manufacturability (DFM) has become pervasive and there is general agreement on the need to apply DFM at multiple stages of the design cycle. DFM techniques at the relatively mature 0.13um technology node entail well known enhancements such as contact and via redundancy, line-ends and borders, and wire spreading. Mature technology nodes achieve product yields which, […]
Ellen Sentovich As EDA Tech Forum went to press, the programme for 2006’s Design Automation Conference (July 24-28) in San Francisco was only just being made public. However, one thing was already clear. The event is set to be bigger than ever before. “We had been concerned about the move to July because of the […]
Analyses made by semiconductor manufacturers have demonstrated that maintaining pattern fidelity is critical, and that this task faces increasing limitations at the 65nm process node and below. At these technology nodes, even the most advanced resolution enhancement technologies (RET) have a difficult time with certain layout topologies. When the impact of this is observed across […]
T he explosion in consumer electronics, especially in the wireless/handheld devices marketplace, has placed a tremendous technical and business burden on engineers in the design of these products. Design teams carry the responsibility of catering to often conflicting and always challenging product specifications. The product needs to be optimized on multiple demand vectors with little […]
The advent of extreme fine line processes at 130nm or less presents many challenges. On the back end, optimizing a design to manage physical effects such as power, heat, and timing is more daunting than ever. At the front end, implementing a system-on-chip’s (SoC) behavior and features is becoming equally difficult. The early exploration of […]
When microprocessor core developer ARM started in a barn outside Cambridge, England, just over fifteen years ago, odds were against it making a global impact. The team of “12 engineers and me”, as then CEO and now chairman Sir Robin Saxby puts it, “had no patents, a working prototype and £1.75m of cash.” Without the […]
Selecting the proper ADC can appear a formidable task. A direct approach is to go to the selection guides and parametric search engines. Enter the sampling rate, resolution, power supply voltage, and other properties. Click ‘find’. But can one approach the task with greater understanding — particularly of the main architectures — and get better […]
For peripheral card and system manufacturers, delivering low-latency high-performance computing solutions at affordable prices has been an insurmountable barrier. Although processor speeds and bandwidth have taken quantum leaps over the last decade, the last few inches between the adapter slot and system CPU represent a bottleneck that restricts the development of cost-effective high-performance computing solutions. […]
More phlegmatic reactions to January’s Consumer Electronics Show were that it was “just like last year, only more so.” And, indeed, the big headlines went once more, to the companies that could claim bragging rights for 100-inch plus plasma screens; to Microsoft and Intel in their aggressive determination to force themselves beyond the PC and […]
