How SystemC enables system modelling at higher levels of abstraction, and the creation of virtual platforms.
It may be necessary to move to three-dimensional 'FinFET' transistors for future process nodes, but what impact will this have on circuit design?
Fully depleted silicon on insulator (FD-SOI) transistor architectures may offer speed and power advantages, at the cost of a shift to non-standard substrates.
Transaction-level modeling (TLM) describes a system by using function calls that define a set of transactions over a set of channels.
Double patterning provides an alternative to using EUV lithography – making it possible to implement ICs on sub-28nm processes.
The IEEE Unified Power Format (UPF) standard is intended to support low-power designs that use switchable power states and power islands.
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