Cadence signs with ARM for core optimizations

By Chris Edwards |  No Comments  |  Posted: May 20, 2014
Topics/Categories: Blog - EDA, Embedded, IP  |  Tags: , , , , ,  | Organizations: ,

Cadence Design Systems has signed the first of a new type of licence for ARM cores that gives the EDA supplier access to upcoming cores in both the 32bit and 64bit families.

The EDA Technology Access Agreement provides Cadence engineers with access to 64bit v8 cores such as the Cortex-A50. Charlie Huang, senior vice president of worldwide field operations, said at CDNLive EMEA on Tuesday (20 May 2014) the aim is to optimize tool support for the cores as they become available to customers.

“With that access we can do a lot of internal tuning. It could be how we use their physical optimization libraries [in tools], decide what is the best floorplan and pin placement, or how to structure the clocks and pipelines. What we do will vary from core to core, and from process to process,” Huang said. “They could be trivial things like a better switch setting or saying ‘here’s a great floorplan’ for people who want to minimise congestion. Or it could more challenging like accessing ARM’s fast models and integrating those within a debug system. It takes a lot of interoperability for that to happen.”

Huang claimed existing cooperation with ARM helped develop technology to speed up the boot process of Linux when run on one of Cadence’s Palladium XP emulators. Huang said the agreement puts the cooperation on a more formal footing than the current ad hoc relationships that EDA companies tend to use with ARM. The deal covers Mali GPUs, ARM system IP and physical libraries as well as Cortex CPUs.

“The agreement opens up a way to access that information ahead of formal release and hopefully ahead of other [EDA] companies,” Huang said. “The agreement provides the framework for accessing information to optimize. It does not necessarily lead to a prepackaged, optimised core but it is an enablement to do things much more formally.”

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