AMBA

October 30, 2017
Debug case study for ARM/AXI based design

Case study: Verifying and optimizing software for power on SoCs

How emulation was used to debug out-of-spec power on a multicore ARM design using the AXI bus.
November 2, 2015
Verification IP for greater productivity

How to cut verification time with VIP

This article shows practical ways to use verification IP for greater productivity with specific code examples from Mentor Graphics' Questa platform.
Article  |  Topics: EDA - Verification  |  Tags: , , , ,   |  Organizations: ,
March 28, 2012

Verification IP

Verification IP is becoming an increasingly important component for system design due to the rapid proliferation of new protocols and interfaces, chiefly driven by mobile comms.
Guide  |  Topics: EDA - Verification  |  Tags: , , , , , , , , , , ,

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors