The correlation of a statistical analysis tool to hardware depends on the accuracy of underlying variation models. The models should represent actual process behavior as measured in silicon. This paper presents an overview of test structures for characterizing statistical variation of process parameters. It discusses the test structure design and characterization strategy for calibrating random […]
Introduction Burgeoning design complexity has greatly increased the scale of the verification effort. At the same time, there is a widening gap between the growth in vital activities such as functional verification and the ability of tools and methodologies to fulfill such tasks efficiently. If we fail to close that gap, the potential impact on […]
Simultaneous Switching Noise (SSN) is the voltage fluctuation caused by the simultaneous switching of groups of output chip I/O drivers that drive high slew rate signals. It has an impact on I/O and core power supply lines and on signal lines, and is an increasingly important challenge for designs that incorporate high performance interfaces, such […]
The paper outlines the criteria upon which an OEM should make its selection of a third-party PCB design supplier. It groups these into three main categories. Staff with appropriate technical and communications skills. Comprehensive and fully documented design processes (ranging from the use of consistent design strategies to approaches to component library maintenance). Tool support […]
Concurrent multi-corner, multi-mode analysis and optimization is becoming increasingly necessary for sub-65nm designs. Traditional P&R tools force the designers to pick one or two mode corner scenarios due to inherent architectural limitations. As an example of the problem, a cellphone chip typically needs to be designed for 20 mode/corners scenarios. In the absence of a […]
There must be a better way to keep track of electronic engineering software licenses. EDA tools are very expensive, essential to R&D work, and must be properly maintained to ensure that commercial designs are completed on-schedule. Nevertheless, companies traditionally set aside little management time to put formal control systems in place for these assets. Consider […]
It is interesting to see how the once widespread concern over design-for-manufacturability (DFM) has begun to recede. Yes, progressive process nodes will present further fabrication challenges. However, users now believe that the EDA world is well-placed to address them. EDA vendors have added more depth and breadth to their offerings. Foundries have provided necessary data […]
We have entered the era of the multi-processor system-on-chip (MPSoC) but it remains a major frustration that, for a technology that is so imminent and so necessary, there is as yet no real vision out there that goes beyond the parochial. Yes, ‘point’ issues are also being addressed, but we need to define the concept, […]
Verification has become one of the main bottlenecks in hardware and system design. Several verification languages, methods and tools addressing different issues in the process have been developed by EDA vendors in recent years. This paper takes the industrial user’s point of view to explore the difficulties posed when introducing new verification methods into ‘naturally […]
