Volumes

March 1, 2007

Revealing the hidden cost of performance for physical verification

The increasingly onerous nature of physical verification at today’s nanometer process geometries requires the regular benchmarking of appropriate tools, if designs are to be realized in a cost-effective manner. However, the criteria for such benchmarking are all too often limited to relatively simplistic notions of ‘performance’. The article explains that the real cost of physical […]

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March 1, 2007

Re-evaluating the flow for package-aware chip design

Chip and package design are all too often still seen as separate stages in the design process. In today’s nanometer age and with the growing use of techniques such as system-in-package, this lack of integration can have catastrophic results. Package designers frequently encounter overly complex and un-routable silicon that requires multiple iterations to fix. Problems […]

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December 1, 2006

Left shifting DFM analysis into the PCB design flow

What do we mean by a ‘left shift’ in design for manufacturing (DFM) analysis? Think of it as moving the DFM analysis from a tool run by the manufacturer into an integrated solution within the printed circuit board (PCB) design system. It is a major advance in the design of PCBs, allowing users to ultimately [...]
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December 1, 2006

Common pitfalls in PCI Express design

PCI Express is a point-to-point communications interface. It is neither an evolved nor enhanced form of PCI or PCI-X, but, essentially, a high speed, low voltage, differential serial pathway for communication between two devices, although it uses the same programming model as its predecessors. It employs a protocol that allows devices to communicate simultaneously by […]

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December 1, 2006

Using self-timed interconnect to accelerate SoC timing closure

Timing closure is one of the major problems faced by SoC designers. The inclusion of several, often diverse, IP cores that need to communicate with each other on a chip makes it difficult for a designer to meet the complex timing requirements between these cores. Furthermore, as process nodes shrink, process variability becomes a more […]

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December 1, 2006

Start here

Simple question. But it’s one aimed specifically at the designers. In the last five years, have you ever been to the Consumer Electronics Show in Las Vegas – or, indeed, any of its international equivalents like CeBit in Hanover? The IDMs – Sony, Toshiba, IBM et al – will have hundreds of people at these […]

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December 1, 2006

Silicon carrier for computer systems

Applications ranging from gaming to digital media to data analytics continue to grow more complex and constantly demand increasing computing power from computer systems. Historic growth in microprocessor performance has primarily been responsible for assuring a steady growth in the computing power of computer systems. Traditionally, this growing performance has been sustained by scaling down […]

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December 1, 2006

Reducing power demands with specialized coprocessors

Consumer electronics is a difficult business.Market windows open and close quickly. Cost is critical. Requirements change unpredictably. Risk is high. Functionality and performance increase with every product generation, while both manufacturing-limitations and feature-driven demand require low power implementations. Of all these, power constraints have the largest impact on current product architectures. As CMOS reaches its […]

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December 1, 2006

Power under control

In late 2001, Nick Baker and other members of the Ultimate TV team at Microsoft learned that the company was ending development work on the product. For a still youthful engineer whose curriculum vitae already took in some ill-fated early-days video card work at Apple and the short-lived 3DO games console, Baker could have been […]

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December 1, 2006

Left shifting DFM analysis into the PCB design flow

What do we mean by a ‘left shift’ in design for manufacturing (DFM) analysis? Think of it as moving the DFM analysis from a tool run by the manufacturer into an integrated solution within the printed circuit board (PCB) design system. It is a major advance in the design of PCBs, allowing users to ultimately […]

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