For simulation to correctly predict silicon behavior, the logic implementing a design should adhere to the setup and hold constraints specified for clocked elements. However, with multiple asynchronous clocks on a single chip driving logic, designers cannot help but violate setup and hold constraints. This causes metastability, which in its turn leads to non-deterministic delays […]
The article describes and illustrates, by way of a case study, an innovative approach to functional verification. It enables the reuse of test patterns through the coordinated combination of a top-level testbench and subordinate testbench modules. It is based on a new add-on tool, VTrac+, that extends Mentor Graphics’ ModelSim/Questa software to stimulate, compare and […]
How visibility-enhanced debug works The emergence of ‘visibility enhancement’ technology provides verification teams with an optimal trade-off between simulation performance and signal visibility. Visibility enhancement enables a methodology consisting of an analysis-driven partial signal dumping procedure that limits the impact on emulation performance while still providing full signal visibility for debug. These are some key […]
Today’s increasingly complex designs typically need to undergo verification at three different levels: block, interconnect and system. There are now well-established strategies for addressing the first two, but the system level, while in many ways the ultimate test, remains the weakest link in the verification process. System verification normally begins only after a prototype board […]
Long before the first portable computer batteries exploded, and even before anyone had the first visions of building massive data centers in the cold northwestern states of Oregon,Washington and Alaska, power consumption by electronic devices was a tough problem for chip designers. The difference now is that we are trying to manage power in ever-smaller […]
The paper discusses the simulation, design, and test of software-defined radios (SDRs), initially using a legacy 16QAM waveform, followed by a new SDR waveform -orthogonal frequency division multiple access (OFDMA). The SDR system’s error vector magnitude (EVM) is first analyzed and its performance is compared with the legacy waveform results. The implementation also includes the […]
Every economic wobble sees technology’s ciabattering classes put down their salad-stuffed sandwiches and decaf mochas to forewarn of threats to venture capital (VC) investment. And so has it gone since the sub-prime mortgage bug finally bit. OK, as a public service, here’s the skinny. We surveyed 20 VC firms and corporate venturing arms and got […]
Increasing system complexity is forcing design teams to avoid errors during the process of system refinement and reduce ambiguities during system implementation to a minimum. On the other hand, the system design approach they choose must enable a project to advance rapidly through all stages of refinement from an algorithmic model to a real system-on-chip […]
Lew Counts It is not unusual for analog circuit designers to exhibit a wistful air of ‘been there, done that’, even if you would never catch them wearing the t-shirt. That goes double for Lewis Counts, vice president of analog technology at Analog Devices and a fellow with the sector giant. “There are things they’re […]
