Verification Futures tackles safety and security

By Chris Edwards |  No Comments  |  Posted: March 8, 2017
Topics/Categories: Blog - EDA, Embedded  |  Tags: , , , ,  | Organizations:

The Verification Futures conference organized by European EDA consultancy TV&S returns for its seventh year in early April with a focus on safety and security in the growing area of cyber-physical systems.

The full program for the event, which takes place on April 6, has now been published. The conference continues its tradition of users setting verification challenges that vendors need to address. This year, the challenges will come from Qualcomm, GE Aviation, and Thales, reflecting the increased attention to the verification problems of cyber-physical systems based on COTS and custom silicon.

The opening keynote will be given by Mike Bennett of Rolls-Royce Control Systems who will describe the SECT-AIR initiative, which was set up to develop strategies for developing high-integrity systems. The closing keynote is from Professor John Colley of the University of Southampton who will cover the safety and security considerations needed for software and hardware verification.

The program includes four specialized technical tracks. They cover hardware verification, software testing, safety engineering, and secure-systems development.

The increased interest in the RISC-V architecture for creating custom processor cores is reflected by a presentation from Andy Betts of Codasip, who will cover strategies for verifying variants. In the security track, Richard Storer will talk about techniques used by hackers, such as ‘fuzzing’ that can inform testing strategies for vulnerabilities.

Attendance is available online, through an Eventbrite booking, as well as at the physical event which takes place close to Reading, UK.

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