EMI/EMC

May 8, 2013
Segement from PCB design rule schematic

Keeping high-speed designs clean with ERC

Electrical rule checks (ERC) are now available to deal with increasing PCB design complexity, speed project delivery and protect the intellectual property within them.
November 1, 2008
board-level

Board-level timing analysis

This paper builds on “Timing Numbers In ICX – What do we do with them?” [1]—a paper presented at the 2006 Mentor Graphics User2User conference (and now available for download at the journal’s Web site, www.edatechforum.com). The original paper focused on the need for timing analysis and the theory behind it; this paper takes a […]

November 1, 2008

Military comms system requires new tools, flow and backplane

The contributor supplies high-end military communications systems to both the US and Canadian Navies and here describes the development of a new methodology and also a new backplane for a system that is now being retrofitted onto all ships in Canada’s fleet. The project represented a tipping point. In specific terms, the changes were undertaken […]

Article  |  Topics: PCB - Design Integrity  |  Tags: , ,

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