Volume 2

December 1, 2005

Which ADC architecture is right for your application – Part One

Introduction Selecting the proper ADC can appear a formidable task, considering the thousands on the market. A direct approach is to go to the selection guides and parametric search engines. Enter the sampling rate, resolution, power supply voltage, and other properties. Click ‘find’. And hope for the best. But it’s usually not enough. How does […]

Article  |  Tags:
June 1, 2005

Destination network-on-chip

The network-on-chip (NoC) design paradigm is seen as a way of enabling the integration of an exceedingly high number of computational and storage blocks in a single chip. But its adoption and practical implementation face important and unsolved issues related to design methodologies, test strategies, and dedicated CAD tools. The System-on-a-Chip Research Lab at the […]

Article  |  Tags:
June 1, 2005

Innovate in volume

If one thing has become clear as process geometries have gone below one micron, it is that the traditional development model is broken. It seems only recently that companies were talking about adopting a greater ‘customer focus’, but even the linear sequence of first, finding out what the client wants; second, getting your designers to […]

Article  |  Tags:
June 1, 2005

Micro-architecture exploration for deep submicron design

Alcatel Space supplies complete satellites for use in geostationary and low-earth orbit as well as custom designs for specific missions. These are based on various in-house platforms which support different payloads according to their final use. Fields serviced include telecommunications, observation, meteorology, navigation and science. The company has 5,600 employees, of which around 2,000 work […]

Article  |  Tags:
June 1, 2005

Power analysis for efficient power planning

As designs grow larger and process technologies continue to shrink, power becomes an increasingly important design consideration. When designing a printed circuit board (PCB), the power consumed by a device needs to be accurately estimated to develop an appropriate power budget and to design the power supplies and cooling system. The PowerPlay power analysis technology, […]

Article  |  Tags:
June 1, 2005

SystemVerilog is changing everything

Considering how complexity has grown over the last 20 years, it is amazing how few dramatic shifts in the design and verification methodology have occurred. When they do happen — mylar to layout tools, gates to RTL, hand-crafted test vectors to testbench automation — they make our work as engineers easier and enable us to […]

Article  |  Tags:
June 1, 2005

The ultimate wish-list

If you want to get a clear idea of just what is taxing engineers at any given time, you can do a lot worse than following the trends that emerge before each annual Design Automation Conference (DAC). “And this year, it is pretty clear that there are three things on everyone’s mind: power, system-level design […]

Article  |  Tags:
June 1, 2005

The whole picture

Once upon a time, placing even the smallest question mark next to Moore’s Law was seen as something beyond heresy. Today, more and more people are voicing such thoughts in the mainstream. One of the most senior figures speaking out is Bernard Meyerson, vice president and chief technologist of IBM’s Systems & Technology Group. The […]

Article  |  Tags:
June 1, 2005

Achieving better DFM: EDA tools pave the way to improved yield

Major yield-Inhibiting Issues At each successive process node, additional defect mechanisms appear and hinder the ability to achieve desired yield (Figure 1). The trend toward declining yields has led to a resurgence in the application of design for manufacturing (DFM) methodologies.Much of this reinvigorated effort relies heavily on a new breed of tools and technologies. […]

Article  |  Tags:
June 1, 2005

A methodology of integrated post tape-out flow for fast design to mask TAT

Semiconductor devices are being fabricated with features that are less than half the wavelength of the available lithography exposure tools. Increasing circuit density has improved the complexity and performance of ICs but also led to serious patterning proximity effects. These effects make the chips almost impossible to fabricate without optical proximity correction (OPC) technology. Thus, […]

Article  |  Tags:

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors