Verific celebrates two decades of parser pre-eminence
Few companies in the semiconductor or EDA space can boast about reaching their 20th anniversary. Fewer still can point to a loyal band of customers, some of whom bring the company’s products with them as they move between jobs, not once but multiple times.
Not so with Verific Design Automation. It is celebrating two decades of supplying the semiconductor industry with solid, all-but-de-facto-standard Parser Platforms.
Many of Verific’s fiercest customer fanbase were willing to step up to fete it with anecdotes and good wishes.
Fierce loyalty to Verific’s value
It’s not often that a company has a relationship with a customer that goes back further than its history. But then, few companies have Scott Aron Bloom, chief technology officer at Blue Pearl Software, as its customer.
Scott first met Verific founder and CTO Rob Dekker around 1997 when Rob was a product director of the Exemplar line at Mentor Graphics. He hired Scott to manage an engineering group tasked with revamping the UI for Exemplar.
Rob left Mentor soon after and formed Verific, leaving Scott with a keen impression of his capabilities. Scott stayed at Mentor for several more years and watched as Verific built its reputation as the de facto front-end supplier of Verilog, SystemVerilog and VHDL parsers.
Scott became vice president of engineering at Stelar Tools, a company developing verification linting tools that visualized and analyzed RTL code. Its tools needed to read in VHDL and Verilog. “It was insane to do that ourselves. It would take four people two to three years or eight-to-12-man years,” says Scott. “With Verific, we were able to jumpstart our development effort.”
Stelar was acquired by Lattice Semiconductor and it became a Verific customer. A year or so later, Scott joined Blue Pearl, a supplier of design analysis tools for functional verification. Not surprisingly, Verific came with Scott.
“The Verific support team gets fixes done quickly,” he says. “Having engineering in the Bay Area gives Verific a huge jump in the ability to offer good service and respond to customers.”
Another plus is the software’s flexibility. Verific will work with a customer to extend the code to meet its specific needs. That extension or addition is not shared with other customers nor will it ever be a product in the Verific’s portfolio. This sense of fair play is part of the culture.
“I met Rob, [Verific COO] Michiel Ligthart and [Verific MD, India] Abhijit Chakrabarty in 1997 and have been a Verific customer for 17 years. I’m fiercely loyal and value what Verific provides. I’m also cheap. I don’t want to reinvent a parser if I can use Verific instead.”
Harnessing expertise to avoid reinventing the wheel
Sometimes, it takes a disappointing relationship to fully appreciate one that adds value.
That’s what Andy Ladd, CEO of Baum, realized after his previous EDA startup became a Verific customer in 2007. Andy worked at the Massachusetts-based company supporting users as the director of the technical sales field organization. Initially, the company integrated with a hardware description language front-end product from a third-party vendor based outside the U.S. but turnaround time for timely bug fixes created many issues with end users.
In 2007, management felt a change was needed so it reengineered its front end to support Verific. After a successful integration, Verific’s front end was installed and the company was happy with the results. After all, Verific’s sole focus is on front-end technology, and almost immediately, Andy’s customers got updates more quickly and the technical sales team was able to respond more quickly with fixes for end-users.
When Andy joined Baum in 2017, the engineering group was developing its own language front end, not the best use of Baum’s limited resources in his estimation. Andy quickly convinced the group to focus on its core strengths –– power analysis and power modeling –– and leave the language front end to Verific, leveraging Verific’s core strength. “If we continued on the path to develop our own front end, it wouldn’t be as robust as Verific’s and it would have required much more support from our engineers, taking away time they could be spending on Baum’s power analysis and modeling technology,” maintains Andy.
During a recent Design Automation Conference (DAC), Baum had a technical issue from a user in Korea that needed a resolution quickly. One of its engineers logged the issue into Verific’s online request form. In no time, one of Verific’s engineers who was at DAC was at Baum’s booth to discuss a solution.
A great product, good support and a flexible business model are characteristics that make Verific special. Verific’s startup program gives new companies a way to focus on their strengths. The flexible program ramps up to accommodate a startup’s needs and can be adjusted to the startup’s situation without being tied to investment revenue. This helps as a small company, with limited R&D budgets, build its business. The flexibility carries over to licensing products, so a company only invests in what it needs. For example, Baum does not support all the languages supported by Verific and is not required to pay for unused language support. If a user demand requires an additional language, it can be added without difficulty.
Baum, like so many other companies that work with Verific, values the relationship. Verific enables companies with limited resources to jump start their product development. For Baum, by combining what it is good at with Verific’s strengths allows it to avoid redoing what’s already been done.
The silent partner
Early in its 20-year history, Verific was a thorn in Andrew Dauman’s side. That’s because Andrew, now vice president of engineering at Tortuga Logic, a developer of hardware security solutions, was vice president of corporate applications engineering at Synplicity and knew a threat when he saw one.
Synplicity, the startup out of Mentor Graphics, was developing synthesis technology for FPGA designs. Verific was an early competitor. Andrew watched as companies competing with Synplicity, such as FPGA vendors and other related companies without RTL expertise, implemented the Verific front end to accelerate time-to-market. Even so, Synplicity held its leadership position and today is part of Synopsys, never becoming a Verific customer. By the time Rob Dekker started Verific in 1999, notes Andrew, Synplicity had a five-year investment in its synthesis front end.
Andrew’s been at Tortuga Logic for two years now and is today a loyal Verific customer. Verific gave Tortuga a huge advantage when it was a young company. As Andrew explains, Verific took something hard and made it into a product. The R&D investment in hardware description languages is a big one and not everyone has RTL expertise, he notess. Verific understands languages and leverages its experience with best-in-class products to create a market using its core competency. With such a reputation, Andrew believes Verific developed a whole ecosystem: “It helped nurture the ecosystem with a flexible business model, flexible products and flexible support. It’s especially apparent to a company like Tortuga Logic that’s well treated by everyone at Verific.
“I think of Verific as a silent partner. In fact, it’s been the front end to many internal development projects that’s not obvious to the outside world. Verific’s impact on the industry has never been visible, but it’s significant.”
Good partnership on all levels
Real Intent knew Verific before it was Verific, says Rajiv Kumar, vice president.. Actually, he clarifies, the first connection was with Rob when he was consulting before officially launching Verific in 1999.
Rob helped Real Intent as it was getting started. They worked together on an HDL parser and Rob wrote the VHDL front end that is still in use today. Over time, Real Intent purchased a host of Verific tools, including SystemVerilog and UPF elaborators.
As far as Rajiv is concerned, there is no need to look at another vendor. “Verific is excellent at supporting us. If one of our high-priority users has an urgent issue, for example, the Verific group in India responds quickly. It knows the code well and gives us excellent support,” he says.
Local support for Real Intent, based in Sunnyvale, Calif., is Hoa Dinh, a Verific long timer who also did a stint at Real Intent, something Rajiv considers a huge plus.
On a personal level, Rajiv says, he’s known Rob, Michiel and Hoa for more than 20 years. It’s a good partnership on all levels and he’s happy working with Verific.
Going the extra mile
“Verific has been a great partner that goes beyond just being a vendor,” says Vic Kulkarni, vice president and chief strategist at ANSYS Semiconductor, provider of RTL power analysis software known as PowerArtist. “I see a unique customer/vendor relationship with Michiel and Rob that we have had from the day I met them. I like their attitude, their mission statement and the metaphor of the giraffe logo for being tall with a view of its surroundings/customers.”
According to Vic, Verific’s support has been crucial to both ANSYS and its worldwide users. It provides easy direct access to its R&D team and is open to collaborations to improve capabilities and efficiency. Because parsing the HDL design description is the first step in RTL power analysis and reduction using PowerArtist, any issues that ANSYS users encounter need to be resolved in short order, something Verific well understands.
Verific HDL parsers are robust, high quality and rich in features, he notes. On multiple occasions, ANSYS found the additional functionality it wanted already existed in Verific’s products. “By being customer focused, it is responsive to questions or requests,” says Vic. “It supports older versions of the parsers when our end-users are not able to migrate quickly to newer versions. Over the years, Verific has provided customized solutions incorporated in PowerArtist.”
Since the Verific source code is integrated into PowerArtist, ANSYS has an advantage for getting bug fixes quickly from Verific experts for any code changes. At the same time, any customized fixes or enhancements by PowerArtist R&D can be incorporated in the Verific code. As parser and language reference manual (LRM) experts, the Verific R&D team readily provides insights on HDL constructs and its syntax/semantics.
“In this business, both partners must be well aligned to meet the goals of common customers. The specific code areas for our needs are maintained regularly, something we do not expect from other vendors and is a key to our ability to respond to the ever-changing front-end languages,” says Vic.
“In our normal product release cycle, the Verific major release is integrated in PowerArtist twice a year. The release goes through the pre-qualification with standalone Verific binary run, qualification and QA qualification stages as different metrics get checked off before integration in the PowerArtist code stream. The major Verific release includes bug fixes reported by PowerArtist along with fixes reported by other Verific customers.
“We are currently in the process of adding functionality to the PowerArtist GUI, enabling visibility into specific blocks of RTL text that define design elements and enhance power-reduction opportunities. Our partnership with Verific allows us to provide the reduction opportunities directly into its source.
“Verific is user focused and responsive to questions or requests coming from the PowerArtist team. Overall, the response from Verific has been timely, mostly within 24 hours of a bug report. On behalf of ANSYS Team, I wish Verific management and the team great success for years to come. Verific goes the extra mile and provides solutions head and shoulders above others.”
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