During the DAC 2017 exhibition days (June 19-21), Austemper’s focus will be on an end-to-end Functional Safety Tool Suite for SoC, ASIC and IP designs. It is particularly targeted at applications in the automotive, industrial, medical and enterprise markets.
The tool suite covers a spectrum of functional safety engineering requirements, including safety analysis, safety synthesis to augment design structures, and safety verification. It has four components, all of which will be available for review.
- SafetyScope implements functional safety estimates based on a mission profile and set of diagnostic coverage mechanisms.
- Annealer automates a hitherto manual and error-prone approach to handle memories, register files, FIFOs or entire processing units.
- RadioScope provides fine-grained safety synthesis capabilities.
- KaleidoScope delivers a parallel fault simulator with hybrid simulation capabilities.