IP Topics

April 4, 2017

Teaching computers to recognize a smile (or frown, or grimace or…)

Using deep learning techniques and convolutional neural networks to bring facial recognition capabilities to embedded systems.
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March 7, 2017
Angela Raucher is product line manager for Synopsys’ ARC EM processors.

An accelerated approach to achieving automotive safety with ASIL D

Addressing the challenge of achieving ASIL D certification of the functional safety of an SoC for use in the safety-critical path of an automotive system.
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March 3, 2017

Reducing the power consumption of USB Type-C digital headsets

Thinner phones are going to need new connectors. Many designers are considering USB Type-C, and the related Audio Device Class 3.0 specification (ADC 3.0), for use in high-quality digital headsets.
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January 31, 2017

Using the MIPI RFFE specification to simplify the control architecture of multi-radio SoCs

The MIPI RFFE standard provides a common approach to controlling power amplifiers, low-noise amplifiers, filters, switches, power management modules, antenna tuners and sensors in SoCs and systems.
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January 19, 2017
USB Type-C VIP featured image

USB Type-C: Verification challenges and solutions

The USB Type-C connector is versatile and already gaining traction in laptops, tablets and desktops. Here's how verification IP plays an important role in achieving the best implementation.
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January 18, 2017
Anders Nordstrom, senior corporate applications engineer, Verification Group, Synopsys

Are you formally connected?

To check the connectivity of an SoC, first you have to define what a connection is...
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January 11, 2017
Derek Bouius

Three steps to implementing robust encryption

A look at the steps necessary to validate implementations of the cryptographic algorithms that are used to protect today’s devices and communications infrastructure.
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December 12, 2016
Eric Huang, Synopsys

USB 2.0 as an integration standard for IoT products

USB 2.0 could become an integration standard for IoT SoCs, due to its ubiquity, available drivers, support for rapid prototyping, and area efficiency.
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December 2, 2016

Hierarchical signoff of SoC designs at advanced process nodes

Hierarchical signoff strategies for large SoCs at advanced nodes can be effective if sufficient attention is paid to reflecting the impact of cross-hierarchy parasitics.
November 29, 2016
Ken Brock, product marketing manager, Synopsys

Six ways to exploit the advantages of finFETs

FinFET processes and libraries are maturing, enabling designers to explore the best ways to take advantage of the capabilities of the new transistor design
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