x pessimism

February 29, 2016
How to expose X-optimism issues in ASIC and FPGA Design by Lisa Piper

How to expose X-optimism issues in ASIC and FPGA design

Static analysis offers a powerful way of identifying potential X-optimism problems before simulation. The article defines the issue and describes an established solution.
Article  |  Topics: EDA - Verification  |  Tags: , , , , ,   |  Organizations:
December 16, 2015
How to expose X-optimism issues in ASIC and FPGA Design by Lisa Piper

Fix X-pessimism in netlists with practical techniques

Traditional approaches do not catch all unknown state sources, lack capacity for big SoCs and mask bugs. Ascent XV addresses and overcomes these issues.

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