Hierarchical signoff of SoC designs at advanced process nodes
Hierarchical signoff strategies for large SoCs at advanced nodes can be effective if sufficient attention is paid to reflecting the impact of cross-hierarchy parasitics.
The contributor supplies high-end military communications systems to both the US and Canadian Navies and here describes the development of a new methodology and also a new backplane for a system that is now being retrofitted onto all ships in Canada’s fleet. The project represented a tipping point. In specific terms, the changes were undertaken […]
New PCB tools have the intelligence to cut time and cost, explains Mark Forbes As far back as Marconi himself, RF design has been seen as having a touch of magic associated with it. Designs that looked just fine on paper would often require empirical tweaks to make them work properly. Until recently, even circuits […]