It’s another busy few weeks for design tool users and the companies that serve them.
First up is SNUG, the Synopsys User Group Meeting, which is happening at the Santa Clara Convention Center, Monday 26 March through Wednesday 28 March.
Why go? Synopsys says more than 2,000 fellow Synopsys users will be attending, so if you’re stuck with an intractable design problem you might well bump into someone at the Convention Center who could help you out with it, tell you where else you might look for an answer – or at least share your pain.
Then there are the keynotes. Naturally Dr Aart De Geus, CEO and chairman of the board of Synopsys, will open the meeting on Monday, while on Tuesday you’ll hear from John Cornish, executive vice president and general manager of ARM’s systems design division. Wednesday will bring what should be a fascinating technology keynote from former TSMC CTO and now Professor Emeritus at University of California, Berkeley, Dr Chenming Hu.
Big themes for the rest of the meeting include a day-long series of tutorials on working with semiconductor intellectual property, a day-long strand on implementing and optimising compute farms for use with Synopsys tools, and another day-long strand on systems design. These are complemented with what many will regard as the real heart of any SNUG meeting – extensive coverage of IC design, implementation, verification, test and sign-off strategies.
Alongside all this education, SNUG will also include a Designer Community Expo, with exhibits from more than 60 companies, and evening events where you can meet like-minded Synopsys users.
With time running short, Synopsys is now offering to register delegates on site. The full details are here.
You’ve got a little longer to get organized to attend the Santa Clara chapter of Mentor Graphics’ U2U user group meeting, which runs at the Santa Clara Marriott on Thursday 12 April.
Why attend? As always, when you are reliant on a company’s tools to get your job done, it is always useful to hear from the boss where he thinks the electronics industry is going and how the EDA industry will evolve to serve it. So an opening keynote from Mentor Graphics’ CEO Dr Walden Rhines should provide useful insights as well as context for the U2U meeting – and the rest of the design year.
Rhines will then give way to Sameer Halpete, vice president of VLSI engineering for nVidia, who will take the meeting for a visit to the bleeding edge of technology, in a keynote entitled Superphones to Supercomputers: The Quest for a Trillion Transistor SOC.
The rest of the day will be dedicated to conference tracks on custom ICs and analog and mixed-signal design; PCB design flows; place and route; silicon test and yield analysis; functional verification; and Calibre, with sessions presented by both Mentor personnel and end users.
One theme that runs through these sessions is the pressure to get designs yielding at 28nm, and working at 20nm. The Santa Clara U2U meeting will include presentations on via doubling and CMP analysis at 28nm; a discussion of litho-aware design from STMicroelectronics; and an update on how Calibre is evolving to enable 20nm designs.
The event will be rounded out with a panel discussion on 3DICs, lunch and networking events.
To register for the Santa Clara U2U meeting, click here.