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X propagation
X propagation
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September 18, 2013
A common methodology to manage X propagation in both design and verification
How all types of engineer can focus on X states that represent real risk, and set aside those that are artifacts of a design process.
Article | Topics:
EDA - Verification
| Tags:
verification
,
X propagation
| Organizations:
Real Intent
May 14, 2013
Building an RTL sign-off flow
RTL sign-off strategies ease SoC design and IP integration by enabling early analysis and optimization of CDC, power, X propagation, timing, and resetability issues.
Expert Insight | Topics:
IP - Assembly & Integration
,
EDA - DFT
,
Verification
| Tags:
clock domain crossing (CDC)
,
DFT
,
formal verification
,
power gating
,
resetability
,
X propagation
| Organizations:
Real Intent
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