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September 17, 2013
Managing power intent, signal isolation and level shifting in a UPF-based multi-voltage IC design
Power intent, signal isolation and level shifting can all be controlled in a UPF-based multi-voltage IC design through careful coding.
Article | Topics:
EDA - IC Implementation
| Tags:
domain merging
,
isolation
,
level shifting
,
power intent
,
UPF
| Organizations:
Synopsys
EDA Topics
DFM
DFT
ESL
IC Implementation
Verification
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