When I left the semiconductor industry to become an EDA Analyst, I was struck by two things. The first was the professionalism of the PR firms handling the EDA accounts. They not only did jobs that would be expected of them by silicon vendors, but also performed functions that we would consider part of a semiconductor marketing team’s job. That moved them from being a necessary evil to a major marketing asset. And then there was the Design Automation Conference (DAC).
As a semiconductor executive, I would have given my right arm for something like DAC. We had a hodgepodge of regional shows that sucked up time and resources, and provided an often-questionable return on investment. By the way, in those days, regional meant Chicago, Denver, Boston, Atlanta, and Dallas – not the more romantic trips to Paris, London, Tokyo and Hong Kong. DAC, on the other hand, had become the lynchpin of the design world. It was Christmas and New Year all rolled into one. Your Yuletide presents were the new EDA tools needed to solve the problems generated by Moore’s Law’s merciless march. That was followed by the parties, DAC as Hogmanay, announcing the beginning of another design year. Everyone was there: the designers, the CAD managers, and, of course, the EDA vendors. Indeed, unless you were a very early stage start-up and did not have a booth at DAC, ‘no party’ was tantamount to saying that you were going out of business. It was an EDA marketing manager’s dream. Not only that but it set the pulse of the EDA Industry.
How did that happen? Back in 1964, two men, Pat Pistilli from Bell Labs and Joe Behar from IBM, got together and started a workshop on design automation. It helped that two six-hundred-pound corporate gorillas started the conference, but it took a lot of effort and a big vision to pull it off, so we cannot forget Marie Pistilli. Her hard work was crucial to DAC’s success. By 1982, they had their first exhibition floor with all of seven vendor booths. It was already a highly respected technical conference, but adding exhibits took things to a new level.
It is interesting to look back at 1982. The first thing you must keep in mind is that DAC was primarily a PCB conference. The few companies that we would classify as EDA vendors today served a niche market for drawing, and digitizing at the same time (very important) IC layouts. These were Calma (which GE ended up acquiring), Applicon and Computer Vision – the members of EDA’s first ‘Big Three’. Most of the show focused on in-house developed PCB layout tools. What you would have seen at 1982’s DAC were not only these first EDA vendors (and no, it was not called EDA back then) but also the emerging gate-level vendors. These companies (the ‘DMV’ of Daisy Systems, Mentor Graphics and Valid Logic Systems) commercialized PCB design tools. This change allowed DAC to take its next step.
The next six years were the most exciting times we have seen in the design world. As the gate-level vendors were commercializing PCB design, the semiconductor vendors were using university-developed tools (SPICE being the prime example) or developing their own. The major breakthrough in the ASIC world was LSI Logic’s development of the first reliable gate-level simulator for ASIC design. Other ASIC vendors noticed that the regular structure of gate arrays made it possible to modify PCB tools for ASIC design. In fact IMI, the originator of the CMOS gate array was Mentor’s first customer. This was also the time that Carver Mead was developing his VLSI Design course at Cal Tech. That, and work done at Bell Labs, spawned a series of silicon compiler vendors, the SXX companies. One of those, SDA, was founded by Jim Solomon from National Semiconductor. Joe Costello joined Jim at SDA and after a series of acquisitions, the company turned into Cadence Design Systems. Around the same time a brilliant engineer from GE Semiconductor, Aart de Geus, came up with a synthesizer that targeted the IMI/LSI Logic gate-level net-list. It used the new Verilog register transfer level (RTL) language as an input. Aart founded Synopsys and Harvey Jones was brought in to run the business. Harvey was ex-Calma and had been one of the movers and shakers at Daisy. Soon Cadence acquired Gateway and its Verilog Simulator. Thus, a robust working commercial RTL design flow was born. DAC then became the arena where CAD managers came to look for commercial tools to replace in-house software.
That shift to RTL transformed DAC into what it is today. The EDA market for IC design tools soon overshadowed the market for EDA PCB design tools. In fact, PCB tools are only around 12% of the EDA market today. And when was the last time you saw a technical session on PCB design at DAC? Since the major PCB vendors also are major IC design tool suppliers we still do have a PCB presence at DAC. In Mentor’s case, it was by expanding their product base. For Cadence it was by acquisition; they bought Valid. However as with those first exhibits in 1982, we are now seeing another group of vendors at DAC. These are the ESL companies such as MathWorks and CoWare, and a host of allied start-ups. Not to leave out Mentor; so far it has been the only one of the Big Three, of its time, to make the jump to the next design methodology. Calma, Applicon and Computer
Vision are gone. Daisy and Valid are gone. Only Mentor is still standing. If you look at its recent product introductions and acquisitions you may deduce that it fully intends to continue to the next level of design.
This time it is going to be a little harder for DAC to follow the design engineering community to the next level. In the shift to gate-level design – and, in most cases, the shift to RTL – the customers were already attending DAC. It was not too hard to attract other designers and CAD managers from the smaller specialized conferences: most had attended DAC off and on. And as I said at the beginning, having one main ‘must attend’ conference is what the semiconductor industry has always needed. At least, it now had one at the design level.
Figure 1. Dac’s evolving user audience
This time it’s different. Three separate design groups are moving into ESL (Figure 1). The first contains the system-on-chip designers that are moving up to system IC designers. They do go to DAC and are fairly easy for vendors to reach. Unfortunately, they are the smallest group, coming in at 18% of the ESL seats. Fortunately, they do have the highest ASP of the three, so it is a good market. The second group is the system design engineers. They also have an EDA connection but it is generally with the PCB vendors. They represent 33% of the market and their ASP is lower than that of the system IC designer. The third group, though, is the swing factor. This is made up of embedded system designers. They account for 49% of the seats; however their ASP is a problem. These are the people DAC needs to attract.
From talking to my user clients, I have come up with a list of the five major design problems for 2007. In order they are Software, Software, Software, DFM and Power (the three software problems are hardware/software partitioning, homogeneous multi-processing and heterogeneous multi-processing). It is no big secret that design costs rapidly shifting to the software side. To solve the power problem, we have started using multi-core processing. In doing so we have left behind the world of Von Neumann computing and the C-based sequential language programming that has driven the software industry for decades. Unfortunately we are proving a little slow in coming up with an answer to the concurrent programming problem.
The microprocessor vendors all have programs to jury-rig C into becoming a concurrent programming language. This usually consists of an intent layer above the C programming that is dumped into a hardware scheduler. What surprised us last year was the number of experts from the software world calling for a new concurrent programming language.
DARPA has just given a contract to Sun Microsystems, AMD and Cray to develop that language. If a new language is developed and if the infrastructure around it does not have a major open source component we can assume an ASP for the embedded system designer that would change the ESL TAM from $1.7 billion to $4.2 billion.
There is hope. The design community is looking to the EDA vendors for help in coming up with a solution. It’s a design problem and EDA companies are here to solve design problems. Also DAC has not stood still. For the last three years, it has tried to attract more of the software community. While I cannot say the results have been stellar, progress has been better than for any other large conference with the exception of DATE. Take that and the fact that DATE, a European conference, has always been a companion to DAC, and things look promising. There are problems. The shake out of the RTL vendors seems to be the major one right now. But hopefully we will get through the next few years and start seeing a shift in DAC attendance to a more balanced mix of hardware and software engineers.