Build vs buy in an SoC world

By Phil Casini |  No Comments  |  Posted: March 1, 2007
Topics/Categories: EDA - ESL  |  Tags:  | Organizations:

We are now entering the tail end of an era, and many of us do not even know it. For as long as there have been microprocessors, there have been engineers and engineering teams whose job it was to create interconnects. Although this will undoubtedly continue in some companies, the increasing complexity of systems-on-a-chip (SoCs) means this is making less and less sense. I say this not only as an executive of a company specializing in SoC solutions, but as someone who has participated in the industry’s evolution for 25 years.

Just a few short years ago, SoC design was relatively straightforward. Consider the original DVD player, essentially a decoding system. The major decision point was the choice of embedded processor. Any logic added was complementary and easily verifiable. Today, digital consumer electronics are a lot more sophisticated. The convergence of latency-dependent data communications and high throughput digital multimedia streaming has caused a shift in SoC design architectures from single to multiprocessing, subsystem-style designs. High-end cell phones, for example, include mobile video processing, games processing, and highly complex communications capabilities. These new features have caused multiple heterogeneous processing elements to become commonplace on single devices, and as a result exponentially increase the complexity of data flows. SoC architectures have now shifted from data processing-centric to data flow-centric.

The real challenge now focuses on how SoC developers choose to accommodate this shift. The complexity of meeting increasing operation speeds – and, as always, the necessity of satisfying the external memory bandwidth requirements – means that data flow architectures have become one of the largest design issues for SoCs. With multiple cores requiring dynamically varying Quality of Service (QoS), security, error and interrupt handling, and data width conversions, microprocessor style buses (which were never designed for this purpose) cannot deliver.

So, we’ll just create what we need in-house, right? Increasingly, the answer is, ‘No’.

As the phrase ‘system-on-a-chip’ (or now sometimes ‘networkon- a-chip’) implies, a lot is happening in a very small space. More and more companies are following the trend already established among the market leaders – that is using third parties whose interconnect technology specializes in managing the data flow, external memory accesses and reducing latency.

When this can be done with a solution that enables seamless upgrades and high reuse, companies are also benefiting from increased cost savings and quicker time-to-market. This can apply both from generation to generation of a product line and across business units.

The architectural design reasons may not be obvious, but market-leading companies today know that outsourcing the interconnect makes economic sense. The best way to prove this is by looking at the state of the mobile phone industry.

Mobile phones started as devices used for conversations without wires. They have progressively decreased in size, but until recently remained solely hardware with which to talk. Today’s handset is almost guaranteed to have some additional features: multi-band support, SMS, MP3 player, camera, video and gaming, to name but a few. Advances in technology may drive the ability to offer these features, but it is customer demand that makes it increasingly necessary for the mobile phone industry to integrate them.

Proof of this is visible in the increase in smart phone sales. According to a November 2006 report by In-Stat, sales of these hybrids of phone and PDA tripled between 2004 and 2005 and doubled between 2005 and 2006. During 2007, demand looks set to continue to grow.


Figure 1. Profit curve for smartphone launches

If we look at high-end,multi-functional smart phones, we can assume that because they must support both conventional data communications and advanced streaming multimedia, a multiprocessor approach must be used for the implementation. The level of SoC complexity is also raised because the utilization rates achieved for the processing elements contained in the SoC will have a significant effect on these devices’ performance and power. If one mobile phone, or more likely one family of phones, has significantly better performance and battery life, that equals competitive advantage.

Sonics modeled what happened when four companies entered the smart phones market. In the interest of simplicity, let’s look at the top two companies from this research. We’ll call them Company A and Company B. Development of their next-generation smart phones starts at the same time. In addition, both companies’ technical capabilities are equal (they are using the same microprocessors, software stacks, engineering talent, etc.).

Suppose then that Company A enters the market with the first version of the product, and Company B enters the market three months later.What are the gross profits for Company A and Company B? Since this segment is highly elastic and very sensitive to time and price competition, overlaying an aggressive gross profit erosion curve over the distribution curve shows the true market dynamics (Figure 1).

You can see from the graph that Company A’s three month lead into the market has resulted in not only more sales, but higher profit, in part because of the higher initial price it was able to charge per-unit. Profit is also affected by the cost of development and rate of productivity. If a company is able to shorten the time-to-market for its products or the window between new generations reaching the market, it is obviously benefiting from improved productivity.

Assuming that the market segment average selling price (ASP) for the SoC starts at $18 ($11.30 cost @ 66% GPM) and drops to $13.50 ($10 cost @35% GPM) at month 32, both companies’ gross profits can then be estimated using the graphs above. Figure 2 shows the impact on gross profit as a result of a three-month ‘delay’ in market entry by Company B. The results show that Company A enjoyed a 25% increase in revenue and a 30% increase in gross profits over the life of the volume distribution when compared to Company B.


Figure 2. Profit comparison for smart phone launches

If both companies started at the same time and their technical merits were the same, what accounted for the difference in time to market? Given the level of SoC complexity, three months represents the difference in one spin on the design. Since the internal interconnect is the primary area of SoC design risk, one iteration of a complex internal interconnect design and verification process can conservatively account for the three-month delay.

Assume then that Company A utilized an intelligent internal interconnect from a third party, one that provided the necessary services in addition to bus features to meet end requirements. Assume also that Company A took advantage of automated tools that accurately predicted the intelligent behavior of the internal interconnects before and during the early phases of the physical chip design. The decision to outsource the intelligent internal interconnect lowered Company A’s risk, ‘saving’ one design spin when compared to Company B. This resulted in Company A’s capturing the premium designs in the nascent market that yielded the additional $25M of gross profit.

Meanwhile, Company B, utilizing an in-house design team, realized a similar interconnect solution, but chose to engineer the intelligent services in addition to the bus features itself. The resulting solution did not have the maturity and robust testing the third party interconnect had. It also did not have the same level of tools automation provided by the third party internal interconnect supplier. Company B’s approach required one extra design spin before production shipments and cost it $25M in gross profit.

Making all of these assumptions and looking at the results, the conclusion must be reached that the decision is not whether an internal team is good enough to design complex interconnect solutions – in most cases the answer genuinely is ‘Yes’ – but rather, is there a possible risk in time-to-market by building complex interconnects in-house?

In the example from the mobile phone industry, what is important is that Company A reduced a major risk item in the SoC development process by deciding to outsource the internal interconnect and boosted its revenue and profitability significantly as a result. Although this example pertains to the mobile phone industry, the same economic shift applies to many competitive high volume markets, such as high-definition televisions, gaming consoles and broadband devices.

In the end, the decision companies need to make is not ‘Buy versus build’, but, ‘If we build it, will we lose significant time-to-market and what will that mean to our revenue and market share?’

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