planarity

May 7, 2020
CMP simulation dummy fill featured image

Keep chip designs on the level with CMP simulation and dummy fill optimization

This case study shows how rising CMP simulation quality can be leveraged to detect the position and type of planarity hotspots before manufacture and verify the planarity of a layout.
Article  |  Topics: EDA - DFM  |  Tags: , , ,   |  Organizations: ,

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